This silver paste is used to form a silver paste layer by applying the silver paste directly on the surface of a copper or copper alloy member, and the silver paste includes a silver powder, a fatty acid silver salt, an aliphatic amine, a high-dielectric-constant alcohol having a dielectric constant of 30 or more, and a solvent having a dielectric constant of less than 30. The content of the high-dielectric-constant alcohol is preferably 0.01% by mass to 5% by mass when an amount of the silver paste is taken as 100% by mass.

A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.

A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.

A display module is disclosed. The display module includes a pixel that includes: first to third self-luminescence elements that are configured to emit light of an ultraviolet wavelength range; first to third color conversion layers respectively corresponding to light emitting surfaces of the first to third self-luminescence elements; a first color filter and a second color filter respectively corresponding to the first color conversion layer and the second color conversion layer; a transparent resin layer corresponding to the third color conversion layer and disposed on a same plane as a plane at which the first color filter and the second color filter are positioned; a transparent cover layer that covers the first color filter, the second color filter, and the transparent resin layer; and an ultraviolet (UV) cutoff filter that covers the transparent cover layer.

A semiconductor device includes a substrate having a plurality of pads on a surface of the substrate, a semiconductor chip that includes a plurality of metal bumps connected to corresponding pads on the substrate, a first resin layer between the surface of the substrate and the semiconductor chip, a second resin layer between the substrate and the semiconductor chip and between the first resin layer and at least one of the metal bumps, and a third resin layer on the substrate and above the semiconductor chip.

A semiconductor device includes a substrate having a plurality of pads on a surface of the substrate, a semiconductor chip that includes a plurality of metal bumps connected to corresponding pads on the substrate, a first resin layer between the surface of the substrate and the semiconductor chip, a second resin layer between the substrate and the semiconductor chip and between the first resin layer and at least one of the metal bumps, and a third resin layer on the substrate and above the semiconductor chip.

Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.

Semiconductor package includes interposer, dies, encapsulant. Each die includes active surface, backside surface, side surfaces. Backside surface is opposite to active surface. Side surfaces join active surface to backside surface. Encapsulant includes first material and laterally wraps dies. Dies are electrically connected to interposer and disposed side by side on interposer with respective backside surfaces facing away from interposer. At least one die includes an outer corner. A rounded corner structure is formed at the outer corner. The rounded corner structure includes second material different from first material. The outer corner is formed by backside surface and a pair of adjacent side surfaces of the at least one die. The side surfaces of the pair have a common first edge. Each side surface of the pair does not face other dies and has a second edge in common with backside surface of the at least one die.

In a described example, an apparatus includes: a patch antenna formed in a first conductor layer on a device side surface of a multilayer package substrate, the multilayer package substrate including conductor layers spaced from one another by dielectric material and coupled to one another by conductive vertical connection layers, the multilayer package substrate having a board side surface opposite the device side surface; and a semiconductor die mounted to the device side surface of the multilayer package substrate spaced from and coupled to the patch antenna.

In a described example, an apparatus includes: a patch antenna formed in a first conductor layer on a device side surface of a multilayer package substrate, the multilayer package substrate including conductor layers spaced from one another by dielectric material and coupled to one another by conductive vertical connection layers, the multilayer package substrate having a board side surface opposite the device side surface; and a semiconductor die mounted to the device side surface of the multilayer package substrate spaced from and coupled to the patch antenna.