Patent classifications
H01L2924/0655
CHIP-ON-FILM PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME
A chip on film (COF) package includes a base film having an upper surface and a lower surface opposite to each other, a bridge film having an edge that overlaps the base film, and an upper surface and a lower surface opposite to each other, a display driver integrated circuit (IC) mounted on the upper surface of the base film, and a heat dissipation member arranged in correspondence with the display driver IC on the lower surface of the base film. The upper surface of the base film and the lower surface of the bridge film adhere to each other in their respective long axis directions, and a long axis length of the bridge film is greater than a long axis length of the base film.
Circuit board with bridge chiplets
Various circuit boards and methods of fabricating and using the same are disclosed. In one aspect, a system is provided that has a circuit board with a pocket and a conductor layer. A chiplet is positioned in the pocket. The chiplet has plural bottom side interconnects electrically connected to the conductor layer and plural top side interconnects adapted to interconnect with two or more semiconductor chips.
Circuit board with bridge chiplets
Various circuit boards and methods of fabricating and using the same are disclosed. In one aspect, a system is provided that has a circuit board with a pocket and a conductor layer. A chiplet is positioned in the pocket. The chiplet has plural bottom side interconnects electrically connected to the conductor layer and plural top side interconnects adapted to interconnect with two or more semiconductor chips.
Film-shaped fired material, and film-shaped fired material with support sheet
A film-shaped fired material of the present invention is a film-shaped fired material 1 which contains sinterable metal particles 10 and a binder component 20, in which a time (A1) after the start of a temperature increase, at which a negative gradient is the highest, in a thermogravimetric curve (TG curve) measured from 40° C. to 600° C. at a temperature-rising-rate of 10° C./min in an air atmosphere and a maximum peak time (B1) in a time range of 0 seconds to 2160 seconds after the start of a temperature increase in a differential thermal analysis curve (DTA curve) measured from 40° C. to 600° C. at a temperature-rising-rate of 10° C./min in an air atmosphere using alumina particles as a reference sample satisfy a relationship of “A1<B1<A1+200 seconds” and a relationship of “A1<2000 seconds”.
Film-shaped fired material, and film-shaped fired material with support sheet
A film-shaped fired material of the present invention is a film-shaped fired material 1 which contains sinterable metal particles 10 and a binder component 20, in which a time (A1) after the start of a temperature increase, at which a negative gradient is the highest, in a thermogravimetric curve (TG curve) measured from 40° C. to 600° C. at a temperature-rising-rate of 10° C./min in an air atmosphere and a maximum peak time (B1) in a time range of 0 seconds to 2160 seconds after the start of a temperature increase in a differential thermal analysis curve (DTA curve) measured from 40° C. to 600° C. at a temperature-rising-rate of 10° C./min in an air atmosphere using alumina particles as a reference sample satisfy a relationship of “A1<B1<A1+200 seconds” and a relationship of “A1<2000 seconds”.
ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device including: a bed having a bed surface; a semiconductor chip having a bottom surface larger than the bed surface, the semiconductor chip being provided such that a center of the bottom surface is disposed above the bed surface and the bottom surface having a first end and a second end; a joint material provided between the bed surface and the bottom surface; a plate-like first wire having a first surface and provided such that the first surface faces the first end; a plate-like second wire having a second surface and provided such that the second surface faces the second end; a first insulating film having a third surface and a fourth surface provided on an opposite side of the third surface, the third surface being in contact with the first end, the fourth surface being in contact with the first surface; and a second insulating film having a fifth surface and a sixth surface provided on an opposite side of the fifth surface, the fifth surface being in contact with the second end, the sixth surface being in contact with the first surface.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device including: a bed having a bed surface; a semiconductor chip having a bottom surface larger than the bed surface, the semiconductor chip being provided such that a center of the bottom surface is disposed above the bed surface and the bottom surface having a first end and a second end; a joint material provided between the bed surface and the bottom surface; a plate-like first wire having a first surface and provided such that the first surface faces the first end; a plate-like second wire having a second surface and provided such that the second surface faces the second end; a first insulating film having a third surface and a fourth surface provided on an opposite side of the third surface, the third surface being in contact with the first end, the fourth surface being in contact with the first surface; and a second insulating film having a fifth surface and a sixth surface provided on an opposite side of the fifth surface, the fifth surface being in contact with the second end, the sixth surface being in contact with the first surface.
ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.