H01L2924/0715

Bonded assembly containing low dielectric constant bonding dielectric material

A first metal layer can be deposited over first dielectric material layers of a first substrate, and can be patterned into first bonding pads. A first low-k material layer can be formed over the first bonding pads. The first low-k material layer includes a low-k dielectric material such as a MOF dielectric material or organosilicate glass. A second semiconductor die including second bonding pads can be provided. The first bonding pads are bonded to the second bonding pads to form a bonded assembly.

LED ASSEMBLY WITH OMNIDIRECTIONAL LIGHT FIELD
20230142465 · 2023-05-11 ·

An LED assembly includes an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.

LED ASSEMBLY WITH OMNIDIRECTIONAL LIGHT FIELD
20230142465 · 2023-05-11 ·

An LED assembly includes an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.

Low warpage high density trench capacitor

A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.

Low warpage high density trench capacitor

A capacitor structure and method of forming the capacitor structure is provided, including a providing a doped region of a substrate having a two-dimensional trench array with a plurality of segments defined therein. Each of the plurality of segments has an array of a plurality of recesses extending along the substrate, where the plurality of segments are rotationally symmetric about a center of the two-dimensional trench array. A first conducting layer is presented over the surface and a bottom and sidewalls of the recesses and is insulated from the substrate by a first dielectric layer. A second conducting layer is presented over the first conducting layer and is insulated by a second dielectric layer. First and second contacts respectively connect to an exposed top surface of the first conducting layer and second conducting layer. A third contact connects to the substrate within a local region to the capacitor structure.

SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME

A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

SEMICONDUCTOR PACKAGE AND METHOD FOR MAKING THE SAME

A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

REMOTE MECHANICAL ATTACHMENT FOR BONDED THERMAL MANAGEMENT SOLUTIONS

A thermal management solution in a mobile computing system is bonded to an integrated circuit component by a thermal interface material layer (TIM layer) that does not require the application of a permanent force to ensure a reliable thermally conductive connection. A leaf spring or other loading mechanism that can apply a permanent force to a TIM layer can be secured to a printed circuit board by fasteners that extend through holes in the board in the vicinity of the integrated circuit component. These holes consume area that could otherwise be used for signal routing. In devices that use a TIM layer that does not require the application of a permanent force, the thermal management solution can be attached to a printed circuit board or chassis at a location remote to the integrated circuit component, where the attachment mechanism does not or minimally interferes with integrated circuit component signal routing.

METHOD FOR PROTECTING BOND PADS FROM CORROSION

Methods, systems, and apparatuses for preventing corrosion between dissimilar bonded metals. The method includes providing a wafer having a plurality of circuits, each of the plurality of circuits having a plurality of bond pads including a first metal; applying a coating onto at least the plurality of bond pads; etching a hole in the coating on each of the plurality of bond pads to provide an exposed portion of the plurality of bond pads; dicing the wafer to separate each of the plurality of circuits; die bonding each of the plurality of circuits to a respective packaging substrate; and performing a bonding process to bond a second, dissimilar metal to the exposed portion of each of the plurality of bond pads such that the second, dissimilar metal encloses the hole in the coating of each of the plurality of bond pads, thereby enclosing the exposed portion.

PIEZOELECTRIC VIBRATION COMPONENT AND APPLICATION METHOD

A piezoelectric vibration component that includes a piezoelectric vibrator, a substrate, and a conductive adhesive that bonds the piezoelectric vibrator to the substrate. The conductive adhesive contains a silicone-based base resin, a cross-linker, a conductive filler, and an insulating filler. The silicone-based base resin has a weight-average molecular weight of 20,000 to 102,000. The cross-linker has a number-average molecular weight of 1,950 to 4,620. The conductive filler and the insulating filler have a particle size of 10 μm or less.