Patent classifications
H01L2924/146
Substrate laminated body and method of manufacturing substrate laminated body
A body, comprising stacked substrates, wherein: a first substrate, an adhesion layer comprising a reaction product of a compound (A), which has a cationic functional group containing at least one of a primary nitrogen atom or a secondary nitrogen atom and which has a defined weight average molecular weight, and a crosslinking agent (B), which has three or more C(O)OX groups in a molecule, in which from one to six of the three or more C(O)OX groups are C(O)OH groups and which has a weight average molecular weight of from 200 to 600, X is a hydrogen atom or an alkyl group having from 1 to 6 carbon atoms, and a second substrate, are layered in this order, and the compound (A) comprises at least one selected from the group consisting of a defined aliphatic amine and a defined compound having a siloxane bond and an amino group.
Semiconductor device and manufacturing method, and electronic appliance
There is provided a semiconductor device including: a plurality of bumps on a first semiconductor substrate; and a lens material in a region other than the plurality of bumps on the first semiconductor substrate, wherein a distance between a side of a bump closest to the lens material and a side of the lens material closest to the bump is greater than twice a diameter of the bump closest to the lens material, and wherein the distance between the side of the bump closest to the lens material and the side of the lens material closest to the bump is greater a minimum pitch of the bumps.
MICROFABRICATED ULTRASONIC TRANSDUCERS AND RELATED APPARATUS AND METHODS
Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.
SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
A semiconductor device includes a base substrate, a detection device provided on the base substrate and including a detector, a first connector electrically connecting the base substrate and the detection device, and a resin package provided on the base substrate and embedded with the detection device and the first connector. The resin package includes an exposure hole exposing the detector of the detection device to the outside, and a concave-convex portion.
METHOD FOR PACKAGING A CHIP AND A CHIP PACKAGE STRUCTURE THEREOF
A method for packaging a chip and a chip package structure are provided. The method is used to package the chip including an acoustic filter. The packaging substrate and the device wafer are welded together, wherein the edge of the device wafer is chamfered, the packaging substrate is provided with a groove, the chamfered portion of device wafer is aligned with the groove on the substrate, and then a mask is disposed. The surface of the mask facing the device wafer is an inclined surface, forming a wedge-shaped opening. A package resin material is printed, wherein the package resin material falls into the groove through the inclined surface of the mask, and a package resin film is formed between the groove and the chamfer. The mask is removed along the first surface toward the second surface. The package resin is cured in a position where the resin film is located.
Microfabricated ultrasonic transducers and related apparatus and methods
Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD, AND ELECTRONIC APPLIANCE
There is provided a semiconductor device including: a plurality of bumps on a first semiconductor substrate; and a lens material in a region other than the plurality of bumps on the first semiconductor substrate, wherein a distance between a side of a bump closest to the lens material and a side of the lens material closest to the bump is greater than twice a diameter of the bump closest to the lens material, and wherein the distance between the side of the bump closest to the lens material and the side of the lens material closest to the bump is greater a minimum pitch of the bumps.
Power module having power device connected between heat sink and drive unit
The present disclosure relates to power modules. The teachings thereof may be embodied in a power unit and/or a drive unit for driving the power unit, along with methods for producing a power module. For example, a power module may include: a power unit including a heat sink; a power device disposed on the heat sink; an insulating layer covering the heat sink and the power device; and a drive unit for driving the power unit, the drive unit comprising a contact element corresponding to the contact area of the power unit. An underside of the power unit is defined by an underside of the heat sink. A top side of the power unit is defined by a contact area thermally and/or electrically coupled to the power device and a surface of the insulating layer surrounding the contact area. The contact element may be disposed abutting the contact area of the power unit for making electrical and/or thermal contact with the power device.
Semiconductor device and manufacturing method, and electronic appliance
There is provided a semiconductor device including: a plurality of bumps on a first semiconductor substrate; and a lens material in a region other than the plurality of bumps on the first semiconductor substrate, wherein a distance between a side of a bump closest to the lens material and a side of the lens material closest to the bump is greater than twice a diameter of the bump closest to the lens material, and wherein the distance between the side of the bump closest to the lens material and the side of the lens material closest to the bump is greater a minimum pitch of the bumps.
Wiring board and electronic package
A wiring board and an electronic package maintain the flatness of the surface of the wiring board. The wiring board includes a flat insulating layer having a flat upper surface, and a conductive layer on the upper surface of the insulating layer with a space left from an outer edge of the insulating layer. The conductive layer includes a peripheral portion, a central portion inward from the peripheral portion, and a linear portion included in the central portion. The peripheral portion is raised along the outer edge of the insulating layer. The linear portion is raised to a height position of the peripheral portion.