A first frame is supported by a heat sink plate, surrounds an unmounted region of the heat sink plate, contains a resin, and has a first surface. A second frame contains a resin, and has a second surface opposing the first surface. An external terminal electrode passes between the first surface and the second surface. An adhesive layer contains a resin, and includes a lower portion, an upper portion, and an intermediate portion. The lower portion connects the external terminal electrode and the first surface to each other. The upper portion connects the external terminal electrode and the second surface to each other. The intermediate portion is disposed within a through hole of the external terminal electrode, and connects the lower portion and the upper portion to each other.

A package includes a base substrate, a frame, and a lead frame. The base substrate is made of metal, and includes a mounting area on which a semiconductor element is to be mounted and a frame area surrounding the mounting area. The frame is provided on the frame area of the base substrate, and includes a first surface facing the frame area and a second surface opposite to the first surface. The lead frame is joined to the second surface of the frame. The frame includes a plurality of dielectric layers having a layered structure and an element connector to be electrically connected to the semiconductor element. The plurality of dielectric layers include a first dielectric layer having first permittivity and a second dielectric layer having second permittivity different from the first permittivity.

A physical quantity sensor includes a sensor element (acceleration sensor element) and a substrate (package) to which the sensor element is attached using a bonding material (resin adhesive), in which, when an elastic modulus of the bonding material is e, 2.0 GPa<e<7.8 GPa is satisfied.

An image sensor package according to an embodiment of the present technology includes: a solid-state image sensor; a transparent substrate; and a package substrate. The solid-state image sensor has a light-receiving surface including a light-reception unit and a first terminal unit, and a rear surface opposite to the light-receiving surface. The transparent substrate faces the light-receiving surface. The package substrate includes a frame portion, a second terminal unit, and a supporting body. The frame portion has a joint surface to be joined to the transparent substrate and includes a housing portion housing the solid-state image sensor. The second terminal unit is to be wire-bonded to the first terminal unit, the second terminal unit being provided in the frame portion. The supporting body is provided in a peripheral portion of the light-receiving surface or at a center portion of the rear surface and partially supports the light-receiving surface or the rear surface.

A packaging substrate, an packaging method and a pressing mould for the packaging method are disclosed. The packaging substrate includes a cover plate and a substrate which are oppositely arranged; a sealed member positioned between the cover plate and the substrate; a connecting part connecting the cover plate and the substrate and positioned at the periphery of the sealed member; and an inorganic layer located outside the connection part and between the cover plate and the substrate. At least a part of the inorganic layer is formed on the outer side surface of the connection part, and an orthographic projection of the inorganic layer on the substrate is located outside an orthographic projection of the sealed member on the substrate.

A semiconductor device of embodiments includes a first semiconductor chip; a metal plate having a first plane and a second plane facing the first plane and including a first ceramic plate provided between the first plane and the second plane; and a first insulating board provided between the first semiconductor chip and the metal plate and facing the first plane, in which the first ceramic plate does not exist between the first semiconductor chip and the second plane.

Embodiments of the disclosure relate to methods for forming a flat surface MIO structure for bonding and cooling electronic assemblies. In one embodiment, the method includes providing a plurality of particles on a surface of a base substrate. A metal is then deposited onto the plurality of particles up to a desired level to form a metal layer such that the plurality of particles is partially covered by the metal layer. An adhesive member is then applied to the plurality of particles exposed above the metal layer. Finally the adhesive member is pulled to remove individual particles of the plurality of particles that are exposed above the metal layer.

The present invention provides a semiconductor device including an insulating layer, a conductive layer bonded to one main surface of the insulating layer, a semiconductor element arranged such that the upper surface of the semiconductor element faces a direction same as the one main surface of the insulating layer, an upper electrode provided on the upper surface of the semiconductor element, a wiring member that has one end electrically bonded to the upper electrode of the semiconductor element and has another end electrically bonded to the conductive layer, and has a hollow portion, a first sealing material, and a second sealing material, in which the first sealing material seals at least part of the semiconductor element so as to be in contact with the semiconductor element, and the second sealing material seals the wiring member so as to be in contact with the wiring member.

The present invention provides a semiconductor device including an insulating layer, a conductive layer bonded to one main surface of the insulating layer, a semiconductor element arranged such that the upper surface of the semiconductor element faces a direction same as the one main surface of the insulating layer, an upper electrode provided on the upper surface of the semiconductor element, a wiring member that has one end electrically bonded to the upper electrode of the semiconductor element and has another end electrically bonded to the conductive layer, and has a hollow portion, a first sealing material, and a second sealing material, in which the first sealing material seals at least part of the semiconductor element so as to be in contact with the semiconductor element, and the second sealing material seals the wiring member so as to be in contact with the wiring member.

A semiconductor device of embodiments includes a first semiconductor chip; a metal plate having a first plane and a second plane facing the first plane and including a first ceramic plate provided between the first plane and the second plane; and a first insulating board provided between the first semiconductor chip and the metal plate and facing the first plane, in which the first ceramic plate does not exist between the first semiconductor chip and the second plane.