A signal transmission circuit includes: a circuit board stored in a housing; a connector which is mounted on the circuit board and includes a first signal terminal and a first ground terminal; and an integrated circuit which is mounted on the circuit board and includes a second signal terminal and a second ground terminal. The first signal terminal and the second signal terminal are connected to each other by a signal wiring arranged on the circuit board. The first around terminal and the second ground terminal are connected to each other by a ground wiring arranged in a predetermined range including a portion immediately above or immediately below the signal wiring in the circuit board. At least a part of the ground wiring immediately above or immediately below the signal wiring has a high impedance structure formed to be wider than the signal wiring and narrower than a combined width of the first signal terminal and the first ground terminal.

An integrated circuit device includes an integrated circuit device die and a substrate. The integrated circuit device die includes a plurality of first contact pads. The first contact pads include a pair of first signal contact pads configured to provide a differential signal port of the integrated circuit device die. The differential signal port is configured to operate at a predetermined frequency. The substrate includes a plurality of second contact pads on a first surface of the substrate. The second contact pads are configured to be soldered to a printed circuit board, and include a pair of second signal contact pads. The integrated circuit device die is affixed to a second surface of the substrate via the first contact pads. The substrate includes a pair of circuit paths that each couple one of the first signal contact pads to an associated one of the second signal contact pads. The pair of circuit paths each have a length to provide a half-wave matching network at the predetermined frequency to match a single-ended signal at the pair of second signal pads to the differential signal port.

A filter device includes an unbalanced terminal, balanced terminals, and first and second resonant circuits. The first resonant circuit is connected to the unbalanced terminal. The second resonant circuit is connected to the balanced terminals and electromagnetically coupled with the first resonant circuit. The first resonant circuit includes a resonator in which an inductor and a capacitor are connected in parallel between the unbalanced terminal and a reference potential. The second resonant circuit includes a resonator including an inductor connected between the balanced terminals and capacitors connected in series between the balanced terminals.

A dual-band transform circuit structure includes a first transmission line, a second transmission line, and a conductive layer. The first transmission line has a first input terminal, a first output terminal, and a second output terminal. The second transmission line has a second input terminal, a third input terminal, a third output terminal, and a fourth output terminal. The second input terminal is coupled to the first output terminal, and the third input terminal is coupled to the second output terminal. The conductive layer is stacked with the first transmission and the second transmission line. The conductive layer includes a first hollow pattern. The first hollow pattern and the second transmission line are overlapped in a top view.

A dual-band transform circuit structure includes a first transmission line, a second transmission line, and a conductive layer. The first transmission line has a first input terminal, a first output terminal, and a second output terminal. The second transmission line has a second input terminal, a third input terminal, a third output terminal, and a fourth output terminal. The second input terminal is coupled to the first output terminal, and the third input terminal is coupled to the second output terminal. The conductive layer is stacked with the first transmission and the second transmission line. The conductive layer includes a first hollow pattern. The first hollow pattern and the second transmission line are overlapped in a top view.

An area-efficient balun and a method for signal processing using such a balun. One example balun generally includes a winding and a clamping circuit. The winding is formed by a coiled trace including a first portion having a first trace width and a second portion having a second trace width, the second trace width being narrower than the first trace width. The clamping circuit has a first terminal and a second terminal, the first terminal of the clamping circuit being coupled to the first portion of the coiled trace.

An area-efficient balun and a method for signal processing using such a balun. One example balun generally includes a winding and a clamping circuit. The winding is formed by a coiled trace including a first portion having a first trace width and a second portion having a second trace width, the second trace width being narrower than the first trace width. The clamping circuit has a first terminal and a second terminal, the first terminal of the clamping circuit being coupled to the first portion of the coiled trace.

A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

In one example, an apparatus comprises: a first metal layer including a first segment and a second segment, in which the first segment is electrically coupled to a single-ended signal terminal, the second segment has a disconnected end; a second metal layer including a third segment and a fourth segment, in which the third segment is magnetically coupled to the first segment, the fourth segment is magnetically coupled to the second segment, a first end of the third segment and a first end of the fourth segment are electrically coupled at a center tap, and a second end of the third segment and a second end of the fourth segment are electrically coupled to respective first and second signal terminals of a pair of differential signal terminals; and a phase adjustment device proximate the center tap and electrically coupled to a second voltage reference terminal.