Patent classifications
H01P7/086
MICROWAVE CHANNEL BETWEEN ADJACENT MICROWAVE CAVITIES INCLUDING QUBITS
A structure includes a first chip substantially located in a first microwave cavity, a second chip substantially located in a second microwave cavity, and a microwave channel connecting the first microwave cavity and the second microwave cavity. The first microwave cavity has a first mode, the second microwave cavity has a second mode, and the microwave channel has a third mode. The third mode dissipates the first mode and the second mode in the microwave channel. The structure further includes a coupling from the first chip to the second chip through the microwave channel.
METHOD FOR MANUFACTURING QUANTUM DEVICE
A method for manufacturing a quantum device, the method includes: mounting a qubit chip over a first substrate by using a first bump; and mounting the first substrate over a second substrate by, after mounting the qubit chip, locally heating a second bump provided at a position that does not overlap the qubit chip in plan view, wherein no joining member that joins the first substrate and the second substrate is provided between the first substrate and the second substrate at a position that overlaps the qubit chip in plan view.
Superconducting qubit memory of quantum computer
A qubit memory of a quantum computer is provided. The qubit memory according to an embodiment includes a first readout unit, a first transmon, and a first data storage unit storing quantum information, and the first data storage unit includes a first superconducting waveguide layer, an insulating layer, and a superconductor layer sequentially stacked on a substrate. In one example, the first superconducting waveguide layer may include a superconducting resonator.
SUPERCONDUCTING QUANTUM CHIP AND PARAMETER DETERMINATION METHOD THEREFOR
The present disclosure discloses a superconducting quantum chip and parameter determination method therefor, and relates to the field of quantum chips. The superconducting quantum chip includes a chip substrate and a quantum module formed on the chip substrate. The quantum module includes a bit capacitor unit, a readout line unit, and a Josephson junction unit. The quantum module further includes a Coplanar Waveguide-Step Impedance Resonator (CPW-SIR) unit. In the superconducting quantum chip disclosed by the present application, functions of a resonator are realized by virtue of the CPW-SIR unit. Thanks to physical properties of the CPW-SIR unit, in a same parallel resonance condition, compared with a Uniformity Impedance Resonator (UIR), the electrical length of the SIR is obviously less
LOSS REDUCTION AND IMPEDANCE ENGINEERING FOR CRYOGENIC APPLICATIONS
An apparatus (e.g., microstrip or stripline) includes a signal line and a lower ground plane that is beneath, and spaced from, the signal line. A dielectric structure supports the signal line and is located at least partially between the lower ground plane and the signal line. The dielectric structure includes a dielectric material defining a plurality of voids and having a void percentage of at least 50%.
MILLIMETER-WAVE BANDPASS FILTER
A coplanar waveguide based (CPW-based) millimeter-wave (mmWave) bandpass filter is disclosed. The filter may comprise a substrate, first and second ground metal plates, an input signal transmission line and an output signal transmission line, and four half-wavelength CPW resonators. A T-slot or an I-slot is optionally embedded into each CPW resonator to improve the suppression at the upper stopband. Optionally, the filter may further comprise two T-stubs respectively connected to the first and second ground metal plates to reduce the size of the filter and generate transmission zeros in the lower stopband. Optionally, the filter may further comprise a cross-shaped dual-mode resonator in a central area of a CPW plane to increase the bandwidth of the filter. The proposed CPW-based mmWave bandpass filter(s) can achieve low passband insertion loss, high out-band suppression, miniature size, and low cost.
TUNING OF SUPERCONDUCTING TUNNEL JUNCTION DEVICES USING MICROFABRICATED HEATERS
Techniques are provided for tuning junction resistances of superconducting tunnel junction devices (e.g., Josephson junctions) by localized thermal annealing of the superconducting tunnel junction devices. An exemplary embodiment includes a device which comprises a substrate, a quantum device comprising a superconducting tunnel junction device disposed on the substrate, and at least one heater element disposed on the substrate. The at least one heater element is configured to generate heat through resistive heating in response to a current applied to the at least one heater element, to heat a region of the substrate on which the superconducting tunnel junction device is disposed to thermally anneal the superconducting tunnel junction device.
QUANTUM CHIP PARAMETER DETERMINATION METHOD AND DEVICE, FILTERING REGULATION METHOD AND DEVICE
The disclosure provides a quantum chip parameter determination method and device, and a filtering regulation method and device, relates to the field of quantum chips, to address the problem that a large amount of space in quantum chips are occupied in order to meet the filtering function of the quantum chips having a large number of qubits; wherein Josephson junctions are provided on the coplanar waveguide of the filter, and adjusting the critical current of the Josephson junctions and changing the equivalent inductances corresponding to the filter enables regulating the center frequency of the filter; the initial length that meets the center frequency range and bandwidth range, as well as the inductance set are selected, so that the Josephson junctions can, during regulation, cover the frequencies required by all resonant cavities, encompassing all resonant cavity frequency bands through one filter.
Tri-layer Merged-element Transmon Qubit
A quantum circuit and related manufacturing method are disclosed. The quantum circuit may comprise a vertical Josephson junction formed by a bottom electrode in a first superconducting material layer, a tunnel barrier, and a top electrode in a second superconducting material layer. A contact portion and a coupling portion of the bottom electrode may be located inside and outside the Josephson junction, respectively. A transmon qubit of the quantum circuit may comprise the Josephson junction and a shunt capacitor formed by the top electrode and the contact portion of the bottom electrode as capacitor plates. A readout circuit may be capacitively coupled to the bottom electrode through the coupling portion and may include a coupling head. The coupling portion may be fitted into a recessed portion of the coupling head. The top electrode may be configured as a floating electrode, not resistively coupled to the first superconducting material layer.