A VCSEL/VECSEL array design is disclosed that results in arrays that can be directly soldered to a PCB using conventional surface-mount assembly and soldering techniques for mass production. The completed VCSEL array does not need a separate package and no precision sub-mount and flip-chip bonding processes are required. The design allows for on-wafer probing of the completed arrays prior to singulation of the die from the wafer. Embodiments relate to semiconductor devices, and more particularly to multibeam arrays of semiconductor lasers for high power and high frequency applications and methods of making and using the same.

A measurement method for a vertical cavity surface emitting laser diode (VCSEL) and an epitaxial wafer test fixture are provided, especially the Fabry-Perot Etalon of the bottom-emitting VCSEL can be measured. When the Fabry-Perot Etalon of the bottom-emitting VCSEL is measured by a measurement apparatus, a light of the test light source of the measurement apparatus is incident from the substrate surface of the VCSEL epitaxial wafer such that the Fabry-Perot Etalon of the bottom-emitting VCSEL is acquired. Through the VCSEL epitaxial wafer test fixture, the bottom-emitting VCSEL can be directly measured by the existing measurement apparatus such that there is no need to change the optical design of the measurement apparatus, and it can prevent the VCSEL epitaxial wafer from being scratched or contaminated.

A light source based on integrated silicon photonics includes a die of a silicon substrate having at least one chip site configured with a surface region, a trench region, and a first stopper region located separately between the surface region and the trench region. The trench region is configured to be a depth lower than the surface region. The light source includes a laser diode chip having a p-side facing the chip site and a n-side being distal to the chip site. The p-side includes a gain region bonded to the trench region, an electrode region bonded to the surface region, and an isolation region engaged with the stopper region to isolate the gain region from the electrode region. The light source also includes a conductor layer in the die configured to connect the gain region to an anode electrode and separately connect the electrode region to a cathode electrode.

A laser chip comprises a first lateral portion comprising a first metal stripe, a first lateral connector coupled to the first metal stripe, a second metal stripe, and a second lateral connector coupled to the second metal stripe; a second lateral portion coupled to the first lateral portion and comprising a first bonding pad coupled to the first lateral connector, and a second bonding pad coupled to the second lateral connector. A method of DFB laser chip fabrication, the method comprises depositing a first portion of a passivation layer; depositing a second metal stripe; depositing a second portion of the passivation layer; and depositing a first metal stripe.

In order to form a reflection film on a rear end facet of a waveguide more easily than conventional, by etching a laminated structure formed on a substrate, a plurality of waveguides segmented in a lattice shape are formed, and a reflection film is formed on a surface of each of the waveguides for reflecting light in each of the waveguides.

A method for manufacturing a monolithically integrated semiconductor optical integrated element comprising a DFB laser, an EA modulator, and a SOA disposed in a light emitting direction, comprising the step of forming a semiconductor wafer on which the elements are two-dimensionally arrayed and aligned the optical axes; cleaving the semiconductor wafer along a plane orthogonal to the light emitting direction to form a semiconductor bar including a plurality of the elements arranged one-dimensionally along a direction orthogonal to the light emitting direction such that the elements adjacent to each other share an identical cleavage end face as a light emission surface; inspecting the semiconductor bar by driving the SOA and the DFB laser through a connection wiring part together; and separating out the semiconductor bar after the inspection to cut the connection wiring part connecting the electrode of the SOA and the DFB laser to isolate from each other.

A vertical cavity surface-emitting laser includes a first insulating film provided on a semiconductor layer, the first insulating film having a recess, an identification mark provided in the recess of the first insulating film, the identification mark being formed of a metal layer, and a second insulating film provided over the semiconductor layer and covering the first insulating film and the metal layer. The metal layer has an upper surface located at a height equal to or lower than an upper surface of the first insulating film.

A semiconductor laser wafer includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, and a composition evaluation layer. The active layer is provided on the first semiconductor layer; multiple periods of pairs of a light-emitting multi-quantum well region and an injection multi-quantum well region are stacked in the active layer; the light-emitting multi-quantum well region is made of a first compound semiconductor and a second compound semiconductor. The second semiconductor layer is provided on the active layer. The composition evaluation layer is provided above the active layer and includes a first film and a second film; the first film is made of the first compound semiconductor and has a first thickness; and the second film is made of the second compound semiconductor and has a second thickness.

A VCSELNECSEL array design is disclosed that results in arrays that can be directly soldered to a PCB using conventional surface-mount assembly and soldering techniques for mass production. The completed VCSEL array does not need a separate package and no precision sub-mount and flip-chip bonding processes are required. The design allows for on-wafer probing of the completed arrays prior to singulation of the die from the wafer. Embodiments relate to semiconductor devices, and more particularly to multibeam arrays of semiconductor lasers for high power and high frequency applications and methods of making and using the same.

Systems, methods, and devices are described for in-situ testing of vertical-cavity surface-emitting lasers (VCSELs), VCSEL arrays or laser diodes (each a laser). Testing may comprise bias voltage measurements of one or more lasers. Embodiments may comprise one of a laser, a driver circuit providing a bipolar drive to the laser, and a sensing circuit to measure and/or monitor damage or degradation of the laser. The bipolar drive may comprise a pulsed forward bias output configured to produce a light output during an on-time of the laser, and a pulsed reverse bias output during an off-time of the pulsed forward bias output. The pulsed outputs may comprise a variable, chirped frequency. One or more of a reverse leakage current, and a junction temperature may be measured to monitor a state of health of the laser.