A light emitting device includes a wiring substrate, a light emitting element array that includes a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface connecting the first side surface and the second side surface to each other and facing each other, the light emitting element array being provided on the wiring substrate, a driving element that is provided on the wiring substrate on the first side surface side and drives the light emitting element array, a first circuit element and a second circuit element that are provided on the wiring substrate on the second side surface side to be arranged in a direction along the second side surface, and a wiring member that is provided on the third side surface side and the fourth side surface side and extends from a top electrode of the light emitting element array toward an outside of the light emitting element array.

A pyrolytic graphite (PG) substrate and laser diode package includes a substrate body having a PG crystalline structure with a basal plane oriented at a pre-determined orientation angle as measured from a longitudinal axis of a heat generating material, such as a laser diode, mounted on a surface of the PG substrate, so that a coefficient of thermal expansion (CTE) of the PG substrate is substantially matched with a CTE of the material.

A high-energy laser (HEL) element is provided and includes a non-conductive substrate layer assembly, a reflector layer assembly and a thermally conductive carbon layer. The thermally conductive carbon layer is at least partially interposed between the non-conductive substrate layer assembly and the reflector layer assembly.

An electrically pumped photonic-crystal surface-emitting laser, the epitaxy structure has a first mesa, the first mesa has multiple air holes and forming a photonic crystal structure, the epitaxy structure further has a second mesa, the second mesa and photonic crystal structure is facing the same direction; a first metal electrode arranged on the insulating layer, and covering the photonic crystal structure; a second metal electrode arranged on the second mesa and protruding out of the groove, making the first metal electrode and the second metal electrode face the same direction; and further make the first metal electrode connect to the first connecting metal and make the second metal electrode connect to the second connecting metal for making the photonic crystal structure become flip chip.

A light emitting element of the present disclosure includes a compound semiconductor substrate 11, a stacked structure 20 including a GaN-based compound semiconductor, a first light reflection layer 41, and a second light reflection layer 42. The stacked structure 20 includes, in a stacked state a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22. The first light reflection layer 41 is disposed on the compound semiconductor substrate 11 and has a concave mirror section 43. The second light reflection layer 42 is disposed on a second surface side of the second compound semiconductor layer 22 and has a flat shape. The compound semiconductor substrate 11 includes a low impurity concentration compound semiconductor substrate or a semi-insulating compound semiconductor substrate.

Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

A pyrolytic graphite (PG) substrate and laser diode package includes a substrate body having a PG crystalline structure with a basal plane oriented at a pre-determined orientation angle as measured from a longitudinal axis of a heat generating material, such as a laser diode, mounted on a surface of the PG substrate, so that a coefficient of thermal expansion (CTE) of the PG substrate is substantially matched with a CTE of the material.

An electronic device (1, and 1A to 1E) according to the present disclosure include a substrate (10, and 10F) made of a ceramic and a housing part (21) including a recessed portion (210) accommodating the substrate. The recessed portion includes a plurality of side wall portions (211) arranged around the substrate along a circumferential direction and respectively facing a plurality of sides (111) of the substrate in a plan view when viewing the substrate from a direction perpendicular to a circuit forming surface (110) of the substrate, and a plurality of gaps (212) each located between two of the plurality of side wall portions adjacent to each other in the circumferential direction. The substrate includes a plurality of corner portions (112) curved toward an inner side of the circuit forming surface in a plan view.

An optical device may include an emitter array including a plurality of emitter groups. Each emitter group may be independently addressable from other emitter groups, of the plurality of emitter groups, for independently lasing. Emitters of the plurality of emitter groups may be interspersed within the emitter array such that a minimum emitter-to-emitter distance within the emitter array is less than a minimum emitter-to-emitter distance within any of the emitter groups.

An electronic device (1, and 1A to 1E) according to the present disclosure include a substrate (10, and 10F) made of a ceramic and a housing part (21) including a recessed portion (210) accommodating the substrate. The recessed portion includes a plurality of side wall portions (211) arranged around the substrate along a circumferential direction and respectively facing a plurality of sides (111) of the substrate in a plan view when viewing the substrate from a direction perpendicular to a circuit forming surface (110) of the substrate, and a plurality of gaps (212) each located between two of the plurality of side wall portions adjacent to each other in the circumferential direction. The substrate includes a plurality of corner portions (112) curved toward an inner side of the circuit forming surface in a plan view.