A light emitting element includes a laminated structure 20 in which a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22 are laminated, a first light reflecting layer 41, and a second light reflecting layer 42 having a flat shape, a base surface 90 located on a side of a first surface of the first compound semiconductor layer 21 has a first region 91 (upwardly convex first-A region 91A and first-B region 91B) including a protruding portion protruding in a direction away from the active layer and a second region 92 having a flat surface, the first light reflecting layer 41 is formed at least on the first-A region 91A, a second curve formed by the first-B region 91B and a straight line formed by the second region 92 intersects at an angle exceeding 0°, and the second curve includes at least one kind of figure selected from the group consisting of a combination of a downwardly convex curve, a line segment, and an arbitrary curve.

A semiconductor surface-emitting laser array can be provided with a group of independently addressable light-emitting pixels arranged in at least two rows and in a linear array on a common substrate chip and including a common cathode and a dedicated channel associated with an address trace line for each pixel. An aggregate linear pitch can be achieved between pixels of the at least two rows along the linear array in a cross process direction that is less than the size of a pixel. The semiconductor laser array can include more than one common substrate chip tiled and stitched together in a staggered arrangement to provide an at least 11-inch wide, 1200pdi imager with timing delays associated with each of the more than one common substrate chip in the staggered arrangement.

A 3D package for semiconductor thermal management can include a 3D submount forming a mechanical block including at least one embedded channel formed within the mechanical block and configured to accept cooling liquid therethrough, a first tubular connection for providing cooling liquid to the at least one embedded channel, and a second tubular connection for removing cooling liquid from the at least one embedded channel. Integrated slots can be provided for accepting and mounting semiconductor components. Mounting holes can be formed in the mechanical block for securing optical elements. At least one semiconductor laser array die can be secured to the mechanical block at the integrated slots, wherein the at least one semiconductor laser array die is kept cool by the cooling liquid flowing through the at least one embedded channel.

A computer adapted to convert images into raw data can provide the raw data to a control interface adapted to transmit the raw data with timing information to an electronic driver circuit. The electronic driver circuit can convert the raw data with the timing information provided by a control interface into regulated current signals provided to the semiconductor laser array at 300 dpi and higher. The semiconductor array can convert the current signals into light to illuminate an imaging member. The laser array can comprise vertical cavity surface emitting lasers providing imaging greater than 300 dpi. Each semiconductor laser can operate at 50 mW or greater.

A method of transferring a semiconductor epi layer onto a metal host substrate is described. An epi layer of a semiconductor chip (e.g., semiconductor laser array) including a substrate can be mounted onto a planar handle wafer with an adhesive, wherein a backside of the substrate faces upward and away from the epi layer and the planar handle wafer. The backside of the substrate can be treated to substantially remove the substrate, while leaving the epi layer undamaged (e.g., by polishing to where no more than 20 micrometers of the substrate remains). Metal can be formed on the treated backside resulting in a metalized backside. The planar handle wafer can then be removed from the epi layer by dissolving the adhesive with a solvent, wherein a modified semiconductor chip remains. The semiconductor chip can be annealed to form a backside ohmic contact interface. The semiconductor chip can then be attached to a mechanical block by the ohmic contact interface.

The light emitting device includes a substrate, and a laminated structure provided to the substrate, and including a plurality of columnar parts, wherein the columnar part includes a first semiconductor layer, a second semiconductor layer different in conductivity type from the first semiconductor layer, and a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer, the laminated structure includes a third semiconductor layer which is connected to an opposite side to the substrate of the second semiconductor layer, and is same in conductivity type as the second semiconductor layer, the second semiconductor layer is disposed between the light emitting layer and the third semiconductor layer, the third semiconductor layer is provided with a recessed part, an opening of the recessed part is provided to a surface at an opposite side to the substrate side of the third semiconductor layer, and a diametrical size in a bottom of the recessed part is smaller than a diametrical size in the opening of the recessed part.

An on-chip miniarray of optically-coupled oxide-confined apertures of vertical cavity surface emitting lasers (VCSELs) is realized by etching holes from the chip surface down to at least one aperture layer. Oxidation of the aperture layer results in electrically-isolated apertures suitable for current injection. The lateral distance between the aperture centers and the shape of the aperture is chosen to result in effective interaction of the neighboring optical modes in the related aperture regions through optical field coupling effect causing the interaction-induced splitting of the wavelengths of the optical modes. At least one aperture has a different surface area due to different spacing of the etched holes. Different aperture sizes result in different wavelengths of the coupled modes. Splitting of the cavity modes in a frequency domain 3-100 GHz extends the modulation bandwidth of the device due to photon-photon interaction effects.

Selective deposition of highly reflective coating and/or anti-reflecting coating over apertures of different VCSELs foiining a miniarray allows stabilizing lasing in a single coherent mode of the array. Most preferably, highly reflective coating covers the largest aperture and stabilizes the fundamental mode of the coherent array. Anti-reflecting coatings can be deposited on at least one other aperture to reduce the photon lifetime and increase the homogeneous broadening of the related resonant wavelength. Consequently broadening of the photon-photon interaction resonances between the cavity modes can be controlled. Such resonance broadening allows control over the shape of the current modulation curve of the miniarray of VCSELs with the frequency maximum defined by the splitting of the cavity modes and the broadening defined by the broadening of the photon resonances. An increase in −3dB modulation bandwidth of the VCSEL miniarray up to at least 70 GHz is possible.

Such miniarray of VCSELs enables efficient coupling of the emitted light to a multimode optical fiber with the efficiency of at least 70%.

A VCSEL device includes an N-type metal substrate and laser-emitting units on the N-type metal substrate. Each laser-emitting unit includes an N-type contact layer in contact with the N-type metal substrate; an N-type Bragg reflector layer in contact with the N-type contact layer; a P-type Bragg reflector layer above the N-type Bragg reflector layer; an active emitter layer between the P-type Bragg reflector layer and the N-type Bragg reflector layer; a current restriction layer between the active emitter layer and the P-type Bragg reflector layer; a P-type contact layer in contact with the P-type Bragg reflector layer; and an insulation sidewall surrounding all edges of the N-type and P-type Bragg reflector layers, the N-type and P-type contact layers, the active emitter layer and the current restriction layer. A P-type metal substrate has through holes each aligned with a current restriction hole of a corresponding laser-emitting unit.

An optical device and a light-source device. The optical device includes a first substrate having a first plane and elements, and a second substrate having a second face that faces the first plane. The elements are disposed on the first substrate to emit or receive light in a direction intersecting with the first plane. The second substrate includes lenses disposed to correspond to the elements, and the second substrate extends in a first direction parallel to the second face to contact the first plane. The second substrate has a joint used to determine spacing between the first substrate and the second substrate, and the joint contacts the first substrate with an area smaller than a maximum size of cross-sectional area parallel to the second face of the joint. The light-source device includes the optical device and a driver to drive the optical device.

An emitter may include a substrate, a conductive layer on at least a bottom surface of a trench, and a first metal layer to provide a first electrical contact of the emitter on an epitaxial side of the substrate. The first metal layer may be within the trench such that the first metal layer contacts the conductive layer within the trench. The emitter may further include a second metal layer to provide a second electrical contact of the emitter on the epitaxial side of the substrate, and an isolation implant to block lateral current flow between the first electrical contact and the second electrical contact.