A method and system for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. Surge protection assemblies are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels of networked devices. Single-channel multimode surge suppressing systems are combined to form multi-port multimode protection systems that connect directly to multiport networked devices supporting communication channels with mixed signals data and direct current power in Gigabit Ethernet networks supporting PoE. The surge suppressing systems mitigate differential and common mode induced interference and protect from overvoltage surges associated with E1, E2, and E3 components of the HEMP and mitigate the over-voltages to predetermined allowable levels within the predetermined time. The surge suppressing systems is interoperable with multimode PoE and support endpoint and midspan PoE devices of Gigabit networks.

According to the present embodiment, a power supply circuit includes a first transistor, a feedback voltage generation circuit, a first voltage generation circuit, and a protection circuit. The first transistor is connected between an input terminal and an output terminal. The feedback voltage generation circuit divides the output voltage to generate a feedback voltage. The first voltage generation circuit supplies a voltage to a first control terminal of the first transistor via a first node based on the feedback voltage and a reference voltage. The protection circuit outputs a voltage that makes the first transistor non-conducting or places the first transistor in a state where the first transistor has a predetermined high resistance value to the first control terminal, when the input voltage increases above a first threshold voltage within a predetermined time.

According to the present embodiment, a power supply circuit includes a first transistor, a feedback voltage generation circuit, a first voltage generation circuit, and a protection circuit. The first transistor is connected between an input terminal and an output terminal. The feedback voltage generation circuit divides the output voltage to generate a feedback voltage. The first voltage generation circuit supplies a voltage to a first control terminal of the first transistor via a first node based on the feedback voltage and a reference voltage. The protection circuit outputs a voltage that makes the first transistor non-conducting or places the first transistor in a state where the first transistor has a predetermined high resistance value to the first control terminal, when the input voltage increases above a first threshold voltage within a predetermined time.

Disclosed are advances in the arts with novel and useful voltage transient protection circuitry in configurations which include a bridge circuit in combination with one or more voltage reference, load to ground circuit, and/or snub circuit such that the output node is held at a selected voltage level, preferably mid-rail, and potentially damaging transient voltages are avoided.

Disclosed are advances in the arts with novel and useful voltage transient protection circuitry in configurations which include a bridge circuit in combination with one or more voltage reference, load to ground circuit, and/or snub circuit such that the output node is held at a selected voltage level, preferably mid-rail, and potentially damaging transient voltages are avoided.

A method and system for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. Surge protection assemblies are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels of networked devices. Single-channel multimode surge suppressing systems are combined to form multi-port multimode protection systems that connect directly to multiport networked devices supporting communication channels with mixed signals data and direct current power in Gigabit Ethernet networks supporting PoE. The surge suppressing systems mitigate differential and common mode induced interference and protect from overvoltage surges associated with E1, E2, and E3 components of the HEMP and mitigate the over-voltages to predetermined allowable levels within the predetermined time. The surge suppressing systems is interoperable with multimode PoE and support endpoint and midspan PoE devices of Gigabit networks.

An apparatus with load dump protection incorporates first and second half-bridge circuits, first and second comparators, and first and second clamping circuits. The first comparator compares a supply voltage with a first set voltage and generates a first comparison signal while the supply voltage exceeds the first set voltage. The second comparator compares the supply voltage with a second set voltage and generates a second comparison signal while the supply voltage exceeds the second set voltage. The first clamping circuit divides the supply voltage and provides a divided voltage to the first half-bridge circuit in response to the second comparison signal. The second clamping circuit divides the supply voltage and provides a divided voltage to the second half-bridge circuit in response to the second comparison signal.

An apparatus with load dump protection incorporates first and second half-bridge circuits, first and second comparators, and first and second clamping circuits. The first comparator compares a supply voltage with a first set voltage and generates a first comparison signal while the supply voltage exceeds the first set voltage. The second comparator compares the supply voltage with a second set voltage and generates a second comparison signal while the supply voltage exceeds the second set voltage. The first clamping circuit divides the supply voltage and provides a divided voltage to the first half-bridge circuit in response to the second comparison signal. The second clamping circuit divides the supply voltage and provides a divided voltage to the second half-bridge circuit in response to the second comparison signal.

A power supply with lightning protection includes a surge voltage suppression apparatus, an electromagnetic interference control circuit, a surge current bypass apparatus, an active bridge rectifier circuit, a power factor correction circuit, and a DC-to-DC conversion circuit. The surge voltage suppression apparatus is used to increase a tolerance of a surge voltage for the power supply. The electromagnetic interference control circuit is coupled to the surge voltage suppression apparatus. The surge current bypass apparatus is used to increase a tolerance of a surge current for the power supply. The active bridge rectifier circuit is used to rectify an input voltage. The power factor correction circuit is used to adjust the rectified input voltage to provide an adjusted input voltage on a bulk capacitor. The DC-to-DC conversion circuit is used to convert the adjusted input voltage into a DC output voltage.

A disconnector device including an isolator connected between a first terminal and to a second terminal, and a sleeve positioned around the isolator and moveable between an un-extended position prior to the isolator operating and an extended position after the isolator operates, the sleeve being configured to trap debris produced by operation of the isolator.