A detection scheme for temporary overvoltages and/or ground fault overvoltages in electric power systems is described. Current passing through a surge arrestor component of the power system is monitored. An algorithm for identifying one or more frequency components of the measured current signal is performed to screen out unwanted harmonics. In some embodiments, this is a frequency domain analysis. The frequency component(s) of the current signal is then compared to a calculated pickup current or pickup voltage of the system to determine if system protection steps should be undertaken.

A detection scheme for temporary overvoltages and/or ground fault overvoltages in electric power systems is described. Current passing through a surge arrestor component of the power system is monitored. An algorithm for identifying one or more frequency components of the measured current signal is performed to screen out unwanted harmonics. In some embodiments, this is a frequency domain analysis. The frequency component(s) of the current signal is then compared to a calculated pickup current or pickup voltage of the system to determine if system protection steps should be undertaken.

A system and method for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. A plurality of shunting assemblies, each including transient voltage suppressors (TVSs), metal oxide varistors (MOVs), gas discharge tubes (GDTs), other mechanical, electrical and ionization discharge devices (IDDs) and combinations thereof of surge limiting technologies, are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels for sensing upstream of the communication channels an overvoltage associated with each of the E1, E2, and E3 components of the EMP and shunting the over-voltages to predetermined allowable levels within the predetermined time.

The present application relates to an electrostatic protection circuit and a full-chip electrostatic protection circuit, wherein the electrostatic protection circuit comprises a detection module, a discharge module, and a control module. The detection module is configured to detect the type of a first voltage and output the detection result. The control module is configured to control the discharge module to be turned on or off based on the detection result of the detection module.

The present application relates to an electrostatic protection circuit and a full-chip electrostatic protection circuit, wherein the electrostatic protection circuit comprises a detection module, a discharge module, and a control module. The detection module is configured to detect the type of a first voltage and output the detection result. The control module is configured to control the discharge module to be turned on or off based on the detection result of the detection module.

Analog Front End (AFE) driver or transmitter is used for ESD protection of an input-output (IO) pin, thus reducing ESD diode count and subsequently lowering the pad capacitance to achieve high performance in IO circuits like double data rate (DDR) IO, PCI Express (Peripheral Component Interconnect Express), etc. The channel of active devices that constitute AFE driver are used to connect an IO pad to discharge the ESD current to ground, thus providing an alternative path to ESD current and subsequently reducing the ESD diode count. An additional p-type device (Driver Path Enabler (DPE)) is coupled between the IO pad and a gate terminal of the AFE driver. This additional p-type device triggers the channel of the AFE driver. This p-type device is controlled by an RC based structure which cuts the p-type device off during regular operations when power is ramped-up.

A system and method for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. A plurality of shunting assemblies, each including transient voltage suppressors (TVSs), metal oxide varistors (MOVs), gas discharge tubes (GDTs), other mechanical, electrical and ionization discharge devices (IDDs) and combinations thereof of surge limiting technologies, are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels for sensing upstream of the communication channels an overvoltage associated with each of the E1, E2, and E3 components of the EMP and shunting the over-voltages to predetermined allowable levels within the predetermined time.

A surge arrestor includes an active part extending along a longitudinal direction of the surge arrester, a first electrode having a first interlocking part, a second electrode resting against a second end of the active part, a flexible insulating housing, and a second interlocking part formed on an inner surface of the flexible insulating housing. The flexible insulating housing includes: a support member mechanically connecting and supporting the assembly of the first electrode, the active part and the second electrode, which has a plurality of supporting elements being arranged parallel to the longitudinal direction of the surge arrester and being arranged laterally at sides of the assembly of the first electrode, the active part and the second electrode, and an insulating expandable part with a plurality of sheds extending outwards, being moulded around the support member and being spaced apart from the assembly.

A direct-current circuit breaker includes a circuit breaker unit and a circuit unit that generates an oscillating current. The circuit unit includes a capacitor and a reactor, a high-speed closer, and a lightning arrester. The circuit breaker unit and the high-speed closer are aligned in a first direction with a distance therebetween that is equal to or longer than a certain spatial distance. The capacitor and the lightning arrester are aligned in a second direction intersecting the first direction with a distance therebetween that is equal to or longer than the spatial distance. A combination of the circuit breaker unit with the high-speed closer and a combination of the capacitor with the lightning arrester are aligned in a third direction intersecting the first direction and the second direction with a distance therebetween that is equal to or longer than the spatial distance.

A direct-current circuit breaker includes a circuit breaker unit and a circuit unit that generates an oscillating current. The circuit unit includes a capacitor and a reactor, a high-speed closer, and a lightning arrester. The circuit breaker unit and the high-speed closer are aligned in a first direction with a distance therebetween that is equal to or longer than a certain spatial distance. The capacitor and the lightning arrester are aligned in a second direction intersecting the first direction with a distance therebetween that is equal to or longer than the spatial distance. A combination of the circuit breaker unit with the high-speed closer and a combination of the capacitor with the lightning arrester are aligned in a third direction intersecting the first direction and the second direction with a distance therebetween that is equal to or longer than the spatial distance.