A power supply circuit includes an internal power source that receives power supply from an external power source, an abnormality detection circuit that receives power supply from the internal power source to detect abnormalities of the external power source, a protection target circuit that receives the power supply from the external power source, and a protection function unit that restricts electric power supplied to the protection target circuit to a predetermined range, when the abnormality detection circuit detects the abnormalities.

A power supply circuit includes an internal power source that receives power supply from an external power source, an abnormality detection circuit that receives power supply from the internal power source to detect abnormalities of the external power source, a protection target circuit that receives the power supply from the external power source, and a protection function unit that restricts electric power supplied to the protection target circuit to a predetermined range, when the abnormality detection circuit detects the abnormalities.

Method for detecting a sag in a phase voltage, including the steps of: measuring, upstream of a switching member and at regular intervals, the phase voltage and a phase current flowing through a phase conductor; when the phase voltage falls below a predetermined voltage threshold, opening the switching member; subsequent to opening the switching member, if the phase voltage returns to a normal voltage value defined according to the phase current, detecting a malfunction of the electricity meter, generating a warning message, and keeping the switching member open; subsequent to opening the switching member, if the phase voltage remains below the predetermined voltage threshold, detecting a sag in the phase voltage, generating an alert message, and closing the switching member.

Embodiments of the present disclosure relate to managing power provided to a semiconductor circuit to prevent undervoltage conditions. A measured voltage value describing a measured supply voltage at a first subcircuit of a semiconductor circuit can be received, the measured voltage value having a first resolution. A selected metric indicative of a supply voltage present at the first subcircuit can be received, the selected metric having a second resolution higher than the first resolution. The selected metric is calibrated to obtain a calibrated metric when a transition of the measured voltage value occurs.

A power controller makes use of a line-voltage detection method to perform brown-out protection and brown-in mechanism. The power controller has a high-voltage node connected via a current-limiting resistor to a line voltage, and a high-voltage startup transistor connected to the high-voltage node. The input voltage at the high-voltage node is divided to provide a fraction result. An offset current flowing through the high-voltage startup transistor and the current-limiting resistor is provided in response to the fraction result. The offset current is stopped in response to the fraction result when the offset current flows through the high-voltage startup transistor and the current-limiting resistor.

A power controller makes use of a line-voltage detection method to perform brown-out protection and brown-in mechanism. The power controller has a high-voltage node connected via a current-limiting resistor to a line voltage, and a high-voltage startup transistor connected to the high-voltage node. The input voltage at the high-voltage node is divided to provide a fraction result. An offset current flowing through the high-voltage startup transistor and the current-limiting resistor is provided in response to the fraction result. The offset current is stopped in response to the fraction result when the offset current flows through the high-voltage startup transistor and the current-limiting resistor.

A reactive power compensation device is connected with an AC power system via a switch, and includes an arm circuit having a plurality of sub-modules connected in series, and a central control protection device. Each of the sub-modules includes a DC capacitor, and a bridge circuit for switching whether or not to output a voltage held in the DC capacitor. The central control protection device is configured to shift to a standby mode in which all semiconductor switching elements constituting the bridge circuit of each of the sub-modules are set to an opened state, with the switch being set to a closed state, when the AC power system has a power failure during operation of the reactive power compensation device, and to shift from the standby mode to a stop mode in which the switch is set to an opened state.

A technique for managing undervoltage in a compute system is disclosed. The technique includes a method that further includes: detecting an AC undervoltage condition in the compute system; and upon detecting the AC undervoltage condition: dynamically determining a holdup time as a function of the present load; determining a monitoring period as a function of the dynamically determined holdup time; waiting for the determined monitoring period to expire; and upon expiration of the determined monitoring period, perform a shutdown process if the AC undervoltage condition persists.

A technique for managing undervoltage in a compute system is disclosed. The technique includes a method that further includes: detecting an AC undervoltage condition in the compute system; and upon detecting the AC undervoltage condition: dynamically determining a holdup time as a function of the present load; determining a monitoring period as a function of the dynamically determined holdup time; waiting for the determined monitoring period to expire; and upon expiration of the determined monitoring period, perform a shutdown process if the AC undervoltage condition persists.

Power switch devices and methods are provided where an undervoltage event in a supply voltage is detected. Information regarding the undervoltage event is stored in a memory element. The memory element is supplied by a control signal.