Patent classifications
H02H3/28
SYSTEM AND METHOD FOR RESTRAINING DIFFERENTIAL BIAS
Examples of the disclosure include a system for modifying a trip level of a circuit, the system comprising a protection device configured to activate responsive to a differential current exceeding the trip level, a first current transformer coupled to an input of the circuit, a second current transformer coupled to the output of the circuit, at least one measurement circuit coupled to the first current transformer and to the second current transformer, the at least one measurement circuit being configured to obtain a first current measurement from the first current transformer, obtain a second current measurement from the second current transformer, determine a bias current based on the first current measurement and the second current measurement, and modify the trip level of the protection device based on the bias current.
Apparatuses and methods for passive fault monitoring of current sensing devices in protective circuit interrupters
Passive monitoring the integrity of current sensing devices and associated circuitry in GFCI and AFCI protective devices is provided. A protection circuit interrupter employs a capacitively coupled noise signal obtained by an arrangement of one or both of line side arms relative to a Rogowski coil. The noise signal is monitored while the line and load sides of a protective circuit interrupter are disconnected, and the connection of the line and load sides disabled if the noise signal fails to correlate sufficiently to a reference noise cycle. When the line and load sides are connected, the RMS value of the observed current signal is monitored such that the line and load sides are disconnected if the observed current signal fails to meet an RMS threshold. The observed current signal is compensated by subtracting the reference noise cycle prior to monitoring for the fault condition applicable to the protective device.
Apparatuses and methods for passive fault monitoring of current sensing devices in protective circuit interrupters
Passive monitoring the integrity of current sensing devices and associated circuitry in GFCI and AFCI protective devices is provided. A protection circuit interrupter employs a capacitively coupled noise signal obtained by an arrangement of one or both of line side arms relative to a Rogowski coil. The noise signal is monitored while the line and load sides of a protective circuit interrupter are disconnected, and the connection of the line and load sides disabled if the noise signal fails to correlate sufficiently to a reference noise cycle. When the line and load sides are connected, the RMS value of the observed current signal is monitored such that the line and load sides are disconnected if the observed current signal fails to meet an RMS threshold. The observed current signal is compensated by subtracting the reference noise cycle prior to monitoring for the fault condition applicable to the protective device.
Power control system and controller for power control system
A power converter includes first and second arms, each having switching elements, and performs power conversion between a DC system and an AC system. An AC circuit breaker and a current control circuit are connected in series between the AC system and the power converter. The current control circuit includes a current-limiting resistor and a disconnector connected in parallel. A controller instructs a disconnector to close after an initial charge of the power converter and opens the AC circuit breaker when an impedance of a line between a first node located on a first end side of the current control circuit and a second node located on a second end side of the current control circuit is not less than a first threshold and an accumulated value of a current flowing through the current control circuit within a certain period of time is not less than a second threshold.
AIRCRAFT SOLID STATE POWER CONTROLLER AND METHOD OF OPERATING AN AIRCRAFT SOLID STATE POWER CONTROLLER
An aircraft solid state power controller comprises a feed node to be electrically connected to a primary electric power supply; a load node to be electrically connected to at least one electric load; and at least one electric switching device, in particular a solid state switching device, which is arranged between the feed node and the load node. The at least one electric switching device is switchable between an on-state, in which the at least one electric switching device provides a low-resistive electric connection between the feed node and the load node; and an off-state, in which the at least one electric switching device electrically isolates the load node from the feed node. The aircraft solid state power controller further comprises a secondary electric power supply, which is independent from the primary electric power supply, and which is configured for applying a test voltage between the feed node and the load node of the aircraft solid state power controller in order to allow determining the switching state of the at least one electric switching device by detecting a voltage drop between the feed node and the load node of the aircraft solid state power controller.
AIRCRAFT SOLID STATE POWER CONTROLLER AND METHOD OF OPERATING AN AIRCRAFT SOLID STATE POWER CONTROLLER
An aircraft solid state power controller comprises a feed node to be electrically connected to a primary electric power supply; a load node to be electrically connected to at least one electric load; and at least one electric switching device, in particular a solid state switching device, which is arranged between the feed node and the load node. The at least one electric switching device is switchable between an on-state, in which the at least one electric switching device provides a low-resistive electric connection between the feed node and the load node; and an off-state, in which the at least one electric switching device electrically isolates the load node from the feed node. The aircraft solid state power controller further comprises a secondary electric power supply, which is independent from the primary electric power supply, and which is configured for applying a test voltage between the feed node and the load node of the aircraft solid state power controller in order to allow determining the switching state of the at least one electric switching device by detecting a voltage drop between the feed node and the load node of the aircraft solid state power controller.
Method for identifying the fault by current differential protection and device thereof
The present invention discloses a method for identifying the fault by current differential protection and a device thereof. The method comprises: measuring the full component currents of the two terminals of a two-terminal line system and calculating the corresponding fault component current vectors; obtaining an operate value by calculating a first difference between an absolute value of the sum of the fault component current vectors and I.sub.set1; obtaining a restrain value by multiplying a second difference with a control factor, in which the second difference is calculated between the maximum of the absolute values of the fault component currents and I.sub.set2 or between the absolute value of the difference of said fault component currents and I.sub.set2; and identifying a fault as an external one or internal one by comparing the operate value with the restrain value. The solutions of the present invention achieve better reliability, sensitivity and faster speed than existing products.
Method for identifying the fault by current differential protection and device thereof
The present invention discloses a method for identifying the fault by current differential protection and a device thereof. The method comprises: measuring the full component currents of the two terminals of a two-terminal line system and calculating the corresponding fault component current vectors; obtaining an operate value by calculating a first difference between an absolute value of the sum of the fault component current vectors and I.sub.set1; obtaining a restrain value by multiplying a second difference with a control factor, in which the second difference is calculated between the maximum of the absolute values of the fault component currents and I.sub.set2 or between the absolute value of the difference of said fault component currents and I.sub.set2; and identifying a fault as an external one or internal one by comparing the operate value with the restrain value. The solutions of the present invention achieve better reliability, sensitivity and faster speed than existing products.
Oring control using low voltage device for high voltage DC rack
A protection circuits for server racks may include an Oring circuit having a first MOSFET, a first diode, and first and second comparators. Each of the first and second comparators supports a maximum voltage difference that is less than an operational voltage of the power supply. The protection circuit also includes a clamping circuit having a second MOSFET and a second diode. Each of the first and second comparators is configured to compare voltage at the first MOSFET with voltage at the second MOSFET. The first comparator is configured to switch the first MOSFET to an off condition using the comparison, and the second comparator is configured to switch the first MOSFET to an on condition using the comparison. The second MOSFET is configured to clamp a node of each of the first and second comparators to below the maximum in the event of a short at the power supply.
Oring control using low voltage device for high voltage DC rack
A protection circuits for server racks may include an Oring circuit having a first MOSFET, a first diode, and first and second comparators. Each of the first and second comparators supports a maximum voltage difference that is less than an operational voltage of the power supply. The protection circuit also includes a clamping circuit having a second MOSFET and a second diode. Each of the first and second comparators is configured to compare voltage at the first MOSFET with voltage at the second MOSFET. The first comparator is configured to switch the first MOSFET to an off condition using the comparison, and the second comparator is configured to switch the first MOSFET to an on condition using the comparison. The second MOSFET is configured to clamp a node of each of the first and second comparators to below the maximum in the event of a short at the power supply.