Methods, apparatus, systems and articles of manufacture are disclosed for preventing undesired triggering of short circuit or over current protection. An example apparatus includes an output terminal; a voltage detection device coupled to a voltage detection input terminal and the output terminal and including a voltage detection output coupled to a logic gate first input terminal; a pulse extender coupled between a logic gate output and a selecting node; a multiplexer coupled to the selecting node and configured to be coupled to a first protection circuit, a second protection circuit, and a driver; and a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.

Methods, apparatus, systems and articles of manufacture are disclosed for preventing undesired triggering of short circuit or over current protection. An example apparatus includes an output terminal; a voltage detection device coupled to a voltage detection input terminal and the output terminal and including a voltage detection output coupled to a logic gate first input terminal; a pulse extender coupled between a logic gate output and a selecting node; a multiplexer coupled to the selecting node and configured to be coupled to a first protection circuit, a second protection circuit, and a driver; and a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.

Provided are a data alignment method, a differential protector, and a differential protection system. The data alignment method comprises: obtaining first sampled current data from a first sampling device; receiving a second message from a second differential protector, the second message comprising second sampled current data and its sampling time stamp, first time information of the second differential protector related to a difference in time of reception from receipt of the first message to a second time node, and second time information of the second differential protector related to a second transmission processing delay from the second time node to transmission of the second message; when time synchronization is maintained, calculating and storing a time calculation deviation between a third time node and a first calculated value of the second time node; when time synchronization is lost, determining the third time node according to the stored time calculation deviation.

An electronic circuit includes: a first series-connection of DC link capacitors (C.sub.A1, . . . , C.sub.Am) and a second series-connection of DC link capacitors (C.sub.B1, . . . , C.sub.Bn) connected in parallel between DC bus bars (DC+, DC−), wherein the first series has a first node (A) between the DC link capacitors thereof and the second series has a second node (B) between the DC link capacitors thereof; and a short-circuit module (301; 401, 407) configured to receive a voltage difference (UM) between the first node and the second node and to cause the DC bus bars short circuited in response to the received voltage difference being greater than a predetermined threshold.

An electronic circuit includes: a first series-connection of DC link capacitors (C.sub.A1, . . . , C.sub.Am) and a second series-connection of DC link capacitors (C.sub.B1, . . . , C.sub.Bn) connected in parallel between DC bus bars (DC+, DC−), wherein the first series has a first node (A) between the DC link capacitors thereof and the second series has a second node (B) between the DC link capacitors thereof; and a short-circuit module (301; 401, 407) configured to receive a voltage difference (UM) between the first node and the second node and to cause the DC bus bars short circuited in response to the received voltage difference being greater than a predetermined threshold.

A transformer system including a transformer including a set of wye windings, a three-phase current transformer, a neutral-current transformer, and a controller. The three-phase current transformer outputs a first signal indicative of a three-phase current conducting through the set of wye windings and the three-phase current transformer. The neutral-current transformer couples the current flowing from the ground to the neutral node of the transformer, and outputs a second signal indicative of a neutral current conducting from the ground node to the neutral node of the transformer. The controller receives the first signal and the second signal, determines whether an external ground fault condition or an internal ground fault condition is present based on the three-phase current and the neutral current, and determines whether a wiring error is present for the three-phase current transformer or the neutral-current transformer based on the three-phase current and the neutral current.

The present disclosure pertains to devices, systems, and methods for monitoring a direct current (DC) system. In one specific embodiment, a system may include a centralized protection and control (CPC) system. The CPC system may include a DC interface configured to be in electrical communication with a first DC system and a communication subsystem configured to receive a first measurement, from a remote device, of at least one electrical parameter of the first DC system. The CPC system may also include a DC monitor subsystem to generate a second measurement of at least one electrical parameter of the first DC system based on the electrical communication between the DC interface and the first DC system and generate a comparison of the first measurement and the second measurement. An action subsystem may generate an action based on the comparison between the first measurement and the second measurement.

Passive monitoring the integrity of current sensing devices and associated circuitry in GFCI and AFCI protective devices is provided. A protection circuit interrupter employs a capacitively coupled noise signal obtained by an arrangement of one or both of line side arms relative to a Rogowski coil. The noise signal is monitored while the line and load sides of a protective circuit interrupter are disconnected, and the connection of the line and load sides disabled if the noise signal fails to correlate sufficiently to a reference noise cycle. When the line and load sides are connected, the RMS value of the observed current signal is monitored such that the line and load sides are disconnected if the observed current signal fails to meet an RMS threshold. The observed current signal is compensated by subtracting the reference noise cycle prior to monitoring for the fault condition applicable to the protective device.

Passive monitoring the integrity of current sensing devices and associated circuitry in GFCI and AFCI protective devices is provided. A protection circuit interrupter employs a capacitively coupled noise signal obtained by an arrangement of one or both of line side arms relative to a Rogowski coil. The noise signal is monitored while the line and load sides of a protective circuit interrupter are disconnected, and the connection of the line and load sides disabled if the noise signal fails to correlate sufficiently to a reference noise cycle. When the line and load sides are connected, the RMS value of the observed current signal is monitored such that the line and load sides are disconnected if the observed current signal fails to meet an RMS threshold. The observed current signal is compensated by subtracting the reference noise cycle prior to monitoring for the fault condition applicable to the protective device.

Passive monitoring the integrity of current sensing devices and associated circuitry in GFCI and AFCI protective devices is provided. A protection circuit interrupter employs a capacitively coupled noise signal obtained by an arrangement of one or both of the line side arms relative to a Rogowski coil. The noise signal is monitored while the line and load sides of a protective circuit interrupter are disconnected, and the connection of the line and load sides disabled if the noise signal fails to correlate sufficiently to a reference noise cycle. When the line and load sides are connected, the RMS value of the observed current signal is monitored such that the line and load sides are disconnected if the observed current signal fails to meet an RMS threshold. The observed current signal is compensated by subtracting the reference noise cycle prior to monitoring for the fault condition applicable to the protective device.