Power cycle life of an intelligent power module that includes an IGBT is estimated by an abnormality detection circuit(s) while a chip temperature detection circuit or a case temperature detection circuit is outputting a chip overheating warning signal or a case overheating warning signal. Once the estimated power cycle life has reached a prescribed value, the abnormality detection circuit outputs an abnormality detection signal to forcedly and permanently stop operation of a driver circuit that drives an IGBT. The abnormality detection circuit may include a prescribed period calculation circuit that calculates the duration of the warning signal, a prescribed count calculation circuit that calculates the number of times the warning signal has been generated, and/or a cumulative time calculation circuit that calculates that the cumulative duration of periods in which the warning signal has been generated so as to estimate the power cycle life of the intelligent power module.

A photovoltaic array of photovoltaic solar cells; a smart dynamic programmable circuit breaker for electrically providing a pulsed 100 microseconds duration short circuit to the photovoltaic array electrical outputs, wherein a response time for the smart dynamic programmable circuit breaker is more than 1 millisecond when responding to a short circuit; a computer program comprising instructions that when executed by the processor perform functions that control the smart dynamic programmable circuit breaker, the computer program comprising: instructions to command the smart dynamic programmable circuit breaker to initiate the 100 microsecond pulsed short circuit; instructions to measure a current magnitude and current rise time of the smart photovoltaic system outputs during the 100 microsecond pulsed short circuit; and instructions to select a behavior curve from a plurality of smart dynamic programmable circuit breaker behavior curves 10% above the current magnitude and current rise time during the pulsed short circuit.

The present invention are a system and a method for controlling solar photovoltaic power generation on the basis of machine learning, the system comprising: solar photovoltaic modules; node control units for switching off a connected solar photovoltaic module when measured current, voltage and power data do not satisfy control data; a gateway unit for storing measured data; a real-time control module for classifying, comparing and analyzing data and storing same, and transmitting a control command to the gateway unit; and machine learning for monitoring a device and data, learning on the basis of machine learning, and extracting functional data required for controlling solar photovoltaic power generation so as to provide control service data according to the result of performed modeling.

A system for controlling the connection of an inverter to a load center. In one aspect, the system cooperatively connects an inverter supply to a load center. When the inverter supply is connected to the load center, the system unbonds the ground conductor of the inverter supply from the neutral conductor of the inverter supply. When the inverter supply is not connected to the load center, or is disconnected from the load center, the system bonds the ground conductor of the inverter supply to the neutral conductor of the inverter supply. The bonding and unbonding may be done by monitoring circuitry that drives a switch, or by an electro-mechanical switch integrating into a plug and that operates without monitoring circuitry.

Distributed switches to suppress transient electrical overstress-induced latch-up are provided. In certain configurations, an integrated circuit (IC) or semiconductor chip includes a transient electrical overstress detection circuit that activates a transient overstress detection signal in response to detecting a transient electrical overstress event between a pair of power rails. The IC further includes mixed-signal circuits and latch-up suppression switches distributed across the IC, and the latch-up suppression switches temporarily clamp the power rails to one another in response to activation of the transient overstress detection signal to inhibit latch-up of the mixed-signal circuits.

A current limiting circuit includes a first voltage terminal, a second voltage terminal, a first transistor and a current limiting module. The first transistor includes an input terminal and an output terminal of the first transistor that are connected in series on a path formed by the first voltage terminal and the second voltage terminal. The current limiting module is electrically connected to a control terminal of the first transistor. The current limiting module is configured to output a control signal to the control terminal of the first transistor for controlling a state of the first transistor so that a current limiting value of the current limiting circuit is adjustable.

Example implementations of the present disclosure relate to a vehicle, a fault monitoring device for a vehicle and a semiconductor device for detecting an overvoltage and/or an overcurrent. The semiconductor device includes a first die and a second die, which is configured to detect an overvoltage and/or an overcurrent in the electrical supply and/or communication of the first die. The semiconductor device also includes an output for outputting a signal, which indicates the overvoltage and/or the overcurrent.

A failure diagnosis circuit configured to diagnose an open-circuit failure in a reverse connection protection transistor includes a power supply unit having a switching transistor electrically connected to a power source and the reverse connection protection transistor and is brought into an on state or an off state in response to a control signal, and in which power is supplied from the power source to the reverse connection protection transistor when the switching transistor is in the on state; a power supply control unit that controls power supply to the reverse connection protection transistor and stop of the power supply by outputting the control signal to the switching transistor; and a diagnosis unit that diagnoses an open-circuit failure in the reverse connection protection transistor on the basis of an output state of the control signal and a detection result of voltage between the switching transistor and the reverse connection protection transistor.

A method and apparatus to bypass, using bypass circuits, non-operating power modules in a power system. Multiple power sources are coupled to inputs of respective power modules. Multiple bypass circuits have respective terminals operatively coupled to the respective outputs of the power modules. The outputs of the power modules are coupled in a series connection and the series connection is coupled across a load. Each bypass circuit includes a switch operatively coupled across a first input of a circuit and an output of a power module. A feedback circuit includes a second input coupled to an output of the circuit. A coupling circuit includes a third input coupled to an output of the feedback circuit. The coupling circuit includes an output operatively coupled across the switch. The switch is biased to provide the bypass responsive to a voltage of the output of the circuit and the voltage of the power module output.

A circuit breaker includes: at least one switching path of a first terminal of the circuit breaker to a second terminal of the circuit breaker; at least one semiconductor switch arranged in the switching path; a semiconductor version switch for predefinably interrupting the switching path upon actuation by a release of the circuit breaker; a characteristic variable unit connected to the release; and a current measuring arrangement for ascertaining a current profile through the at least one semiconductor switch, the current measuring arrangement being connected with the characteristic variable unit. The characteristic variable unit correlates a characteristic variable with a junction temperature of the at least one semiconductor switch that is ascertained from the current profile through the at least one semiconductor switch.