Provided are embodiments for a system for performing input power detection. The system includes a first input for a first power source, a second input for a second power source, and a controller that is operably coupled to the first power source and the second power source. The system also includes a first path connecting a first circuit to the first power supply, wherein the first path comprises a first field effect transistor (FET) that is operated to inhibit leakage current flow to the first circuit, and a second path connecting a second circuit to the second power supply, wherein the second path comprises a second FET that is operated to inhibit leakage current flow to the second circuit. Also provided are embodiments for a method for performing input power detection.

A miniature circuit breaker for providing short circuit and overload protection is disclosed herein. The miniature circuit breaker features a field effect transistor (FET), which may be a depletion mode metal oxide semiconductor FET (D MOSFET), a junction field-effect transistor (JFET), or a silicon carbide JFET, the FET being connected to a bi-metallic switch, where the bi-metallic switch acts as a temperature sensing circuit breaker. In combination, the D MOSFET and bi-metallic switch are able to limit current to downstream circuit components, thus protecting the components from damage.

The present disclosure includes: a power generator; and a power line through which power generated by the power generator is transmitted to a load. The power line between the power generator and the load is provided with: a current limitation device configured to, when detecting occurrence of a fault current, limit the fault current; and a current interruption device configured to interrupt current heading for the load, in conjunction with the limitation of the fault current performed by the current limitation device.

A MOSFET circuit clamps a MOSFET gate voltage (either directly or via a gate control circuit) when the source voltage exceeds a threshold level, for example in response to a voltage surge event between the source and drain. In particular, the gate is held at a voltage relative to the source, to turn off the first MOSFET during such a surge event, but not during normal operation. This provides automatic protection against unwanted increases in the input voltage, especially when the MOSFET was in its on state during the switching. A threshold circuit is connected between a gate (or gate control node) and a reference voltage. When the voltage at the source exceeds a voltage threshold level, it conduct a unidirectional circuit component (D18) between the source and gate (or gate control node), and the threshold circuit.

Devices having one primary transistor, or a plurality of primary transistors in parallel, protect electrical circuits from overcurrent conditions. Optionally, the devices have only two terminals and require no auxiliary power to operate. In those devices, the voltage drop across the device provides the electrical energy to power the device. A third or fourth terminal can appear in further devices, allowing additional overcurrent and overvoltage monitoring opportunities. Autocatalytic voltage conversion allows certain devices to rapidly limit or block nascent overcurrents.

Disclosed are a surge protection device and a chip constituted thereby, and a communication terminal. The surge protection device comprises an input pad and an output pad. The input pad is connected to a power supply voltage, and the output pad is connected to a ground wire. NMOS transistor groups are provided between the input pad and the output pad. The NMOS transistor groups are connected to the input pad and the output pad respectively by means of metal wires. The structures of the metal wires between the NMOS transistor groups and the input pad and the output pad respectively and/or the structures of the NMOS transistor groups are changed to reduce or cancel non-uniform turn-on of the NMOS transistor groups caused by metal wires having different lengths from the NMOS transistor groups to the input pad and the output pad respectively along a power supply voltage wire direction.

A hot-swap controller regulates the supply of power from an input node to a load coupled to an output node. The controller includes at least one limiting circuit configured to control a first switch connected between the input node and the load to limit an output current of the first switch for application to the load. A control logic circuit determines a state of the first switch and outputs a local state signal, and a communication circuit responsive to the local state signal establishes a voltage or current level corresponding to the local state at a communication circuit output. A communication terminal is also provided that is responsive to the communication output and that is adapted to connect to a second communication terminal of a second hot-swap controller to communicate the local state to the second hot-swap controller.

A miniature circuit breaker for providing short circuit and overload protection is disclosed herein. The miniature circuit breaker features a field effect transistor (FET), which may be a depletion mode metal oxide semiconductor FET (D MOSFET), a junction field-effect transistor (JFET), or a silicon carbide JFET, the FET being connected to a bi-metallic switch, where the bi-metallic switch acts as a temperature sensing circuit breaker. In combination, the D MOSFET and bi-metallic switch are able to limit current to downstream circuit components, thus protecting the components from damage.

A power supply control device controls power supply from a DC power source to a load, by turning on or off a MOSFET. A current regulation circuit regulates a current flowing through a device resistor to a current proportional to a voltage between the drain and the source of the MOSFET. A drive circuit turns off the MOSFET when a voltage across a resistor circuit exceeds a predetermined voltage. The on-resistance of the MOSFET varies according to an ambient temperature of the MOSFET. The resistance of the resistor circuit varies in a direction different from a direction in which the on-resistance of the MOSFET varies, according to the ambient temperature of the MOSFET.

A method for controlling an efuse circuit is provided. The method includes the following steps. A sample signal of a switch is provided. An error signal is generated according to the sample signal and a reference signal. The error signal is compared with a threshold. A voltage across a control node of the switch and an output node of the switch is clamped to a preset voltage value when the error signal is greater than the threshold.