According to an aspect of this disclosure, an intrinsically safe circuit includes a voltage source, a Zener diode, a transistor, a switching element, one or more resistors, and a current limiting stage. According to this aspect, the intrinsically safe circuit may be configured such that an over-voltage threshold is determined by a voltage across the Zener diode, a base-emitter voltage of the transistor, and a voltage across the one or more resistors.

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

An apparatus detects complex time-variant electromagnetic disturbances resulting from a high-altitude nuclear electromagnetic pulse (EMP) or solar storm. The device relies on a circuit (104, 1301) to monitor the input power lines (301, 401, 501) for sustained conducted electrical disturbances associated with the E3 phase of an EMP or solar storm. A separate circuit (105, 1302) monitors the power lines and the ambient environment (503) for transient electromagnetic pulse disturbances associated with the E1 and E2 phases of an EMP. When sustained electrical disturbances or transient electromagnetic pulse disturbances are detected, the apparatus provides a visual alarm (603. 609), audible alarm (608), and discrete indication signal (607) that can be used to disconnect (702) or redirect the flow of electrical power.

A method and system for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. Surge protection assemblies are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels of networked devices. Single-channel multimode surge suppressing systems are combined to form multi-port multimode protection systems that connect directly to multiport networked devices supporting communication channels with mixed signals data and direct current power in Gigabit Ethernet networks supporting PoE. The surge suppressing systems mitigate differential and common mode induced interference and protect from overvoltage surges associated with E1, E2, and E3 components of the HEMP and mitigate the over-voltages to predetermined allowable levels within the predetermined time. The surge suppressing systems is interoperable with multimode PoE and support endpoint and midspan PoE devices of Gigabit networks.

Multi-semiconductor SSPCs that solve bus level problems affecting systems as well as controller level problems affecting individual multi-semiconductor SSPCs are disclosed. Bus level and controller level problems adversely affect multi-semiconductor SSPCs and their associated systems. The disclosed multi-semiconductor SSPCs solve both bus level and controller level problems by implementing controlled rate-change of voltage (dv/dt) ramp-on rate, to ensure that the voltage on the input bus does not collapse when a multi-semiconductor SSPC is commanded closed and that a minimum amount of power is being dissipated evenly across the switching semiconductors.

In embodiments, an integrated circuit is provided that includes an input/output cell having a first signal terminal and a second signal terminal connected to a domain and capable of withstanding a maximum voltage greater than the power supply voltage. The input/output cell further includes an array of N diodes coupled in series between the second signal terminal and a cold power supply point. The array has an overall threshold voltage greater than the maximum voltage. The integrated circuit further includes a control circuit connected between the first signal terminal and the array of diodes. The control circuit is configured, in the presence of a second voltage on the first signal terminal greater than the maximum voltage, to automatically and autonomously short-circuit at least one of the diodes in the array to limit the voltage on the second signal terminal to a third voltage less than the maximum voltage.

A high voltage DC (HVDC) system can include a generator configured to output alternating current (AC), a rectifier connected to the generator via AC phase lines, the rectifier configured to convert the AC to DC to output the DC to DC feeder lines, and a crowbar system. The crowbar system can include a switch module operatively connected to the AC phase lines to prevent AC from flowing to the rectifier in a cutoff state. The crowbar system can be configured to determine whether at least one cutoff condition exists. The at least one cutoff condition can be or include one or more of a DC overcurrent downstream of the rectifier, a DC overvoltage downstream of the rectifier, an AC overcurrent from the generator, or an arc fault. The crowbar system can be configured to control the switch module to the cutoff state if the at least one cutoff condition exists.

A surge suppression circuit for a track circuit is provided. The surge suppression circuit comprises a first surge protection device including a first pair of silicon avalanche diodes and a second surge protection device including a second pair of silicon avalanche diodes. The first surge protection device is connected on a first connection line between a first terminal of a railroad signaling electronic equipment to be protected from a surge and a first terminal of a first rail of two physical rails. The second surge protection device is connected on a second connection line between a second terminal of the railroad signaling electronic equipment and a second terminal of a second rail of the two physical rails. The first surge protection device and the second surge protection device are connected to an earth ground terminal.

A motor wiring member configured to supply three-phase alternating current to a motor includes conductive wires, each of which has a connecting portion being provided at one end and being configured to be connected to a coil end of a stator of the motor, a terminal being provided at an other end of each conductive wire and being configured to be connected to an electrode of a terminal block, and a surge suppression section being configured to suppress an overvoltage from being applied to the motor. The surge suppression section includes three series circuits, each of which includes a resistor and a capacitor. One ends of the three series circuits are electrically connected to the conductive wires of respective phases, and other ends of the three series circuits are electrically connected to each other. The surge suppression section is provided along with the conductor wires near the terminal and is located between the terminal and the connecting portion.

A crowbar module includes first and second electrical terminals, a module housing, and first and second crowbar units. The first crowbar unit is disposed in the module housing and includes a first thyristor electrically connected between the first and second electrical terminals. The second crowbar unit is disposed in the module housing and includes a second thyristor electrically connected between the first and second electrical terminals in electrical parallel with the first crowbar unit.