An overvoltage absorption circuit and a single-phase HERIC topology are provided. The overvoltage absorption circuit is applicable to the single-phase HERIC topology, and includes a clamping capacitor, an absorption resistor, a first diode, and a second diode. One terminal of the clamping capacitor and one terminal of the absorption resistor are each connected to collectors of two cross transistors in the single-phase HERIC topology. The other terminal of the clamping capacitor and the other terminal of the absorption resistor are each connected to the anodes of the first diode and the second diode. The cathode of the first diode is connected to the emitter of one of the two cross transistors. The cathode of the second diode is connected to the emitter of the other of the two cross transistors.

An electrical receptacle contains a plug outlet that has a pair of contacts for electrical connection to respective hot and neutral power lines. A controlled switch, such as a TRIAC, is connected in series relationship between the outlet contact and the hot power line. Sensors in the receptacle outputs signals to a processor having an output coupled to the control terminal of the controlled switch. The processor outputs an activation signal or a deactivation signal to the controlled switch in response to received sensor signals that are indicative of conditions relative to the first and second contacts.

A device, a method and a system for monitoring an electrical connection status of a disconnector device (110). The disconnector device (110) being connectable to pole-mounted equipment in a power distribution or transmission grid (200), thereby disconnecting the pole-mounted equipment. The connection status monitoring device (100) comprises a determining section (130) configured to determine whether the disconnector device (110) has been activated and to generate connection status indicator data, indicative of whether the disconnector device (100, 110) has been activated. The determining section (130) further comprises a wireless communication section (140) which is adapted to connect to a wireless communication infrastructure (150) using a wireless communication protocol, and to transmit the connection status indicator data over the wireless communication infrastructure (150).

A power management system includes a first power line, a second power line, a first parallel protector, a second parallel protector, a third parallel protector, a first current sensor, a second current sensor, a third current sensor, and a processor. The first parallel protector is coupled to the first power line. The second parallel protector is coupled to the first parallel protector and the second power line. The third parallel protector is coupled to the first parallel protector and a ground terminal. The first current sensor, the second current sensor and the third current sensor respectively sense a first current flowing through the first parallel protector, a second current flowing through the second parallel protector, and a third current flowing through the third parallel protector. The processor detects a surge discharging path according to the first current, the second current and/or the third current.

Example devices and methods for compensating for monitoring a surge protection device are provided. In some embodiments, a device is configured to couple to a surge protection device. The device comprises a processor that is capable of sending a DC current signal. A serial data interface is electrically connected to the processor and includes at least one shift register. The device also comprises a multiplexer coupled to the serial data interface. The serial data interface is operable to direct the DC current through the multiplexer. The device also comprises an analog to digital converter (optionally embedded within the processor) that is operable to output a digital signal corresponding to a voltage induced by the DC current signal. Returned DC signals represent surge protection device's health and a multitude of other surge module information.

In one embodiment, an overvoltage protection device (100) may include a crowbar device (106), where the crowbar device (106) includes a first crowbar terminal (115), the first crowbar terminal (115) connected with a first external voltage line (102). The overvoltage protection device (100) may further include a transient voltage suppression (TVS) device (108), where the TVS device (108) includes a second TVS terminal (121), the second TVS terminal (121) connected with a second external voltage line (104). The crowbar device (106) and the TVS device (108) may be arranged in electrical series between the first crowbar terminal (115) and the second TVS terminal (121).

A TVS circuit having a first diode with a cathode coupled to a first terminal and an anode coupled to a first node. A second diode has an anode coupled to a second node and a cathode coupled to a third node. A third diode is coupled between the first node and second node. A fourth diode is coupled between the first node and third node. A fifth diode is coupled between the second node and a second terminal. A sixth diode is coupled between the second terminal and the third node. A seventh diode can be coupled between the second terminal and an intermediate node between the fifth diode and sixth diode. The first diode is disposed on a first semiconductor die, while the second diode is disposed on a second semiconductor die. Alternatively, the first diode and second diode are disposed on a single semiconductor die.

A neutral arrangement is provided for a converter station of a direct current power transmission system that includes a first converter. The neutral arrangement includes surge arrestors and a group of neutral buses. Each surge arrestor is connected between a neutral bus and ground. The neutral arrangement includes a high voltage insulation zoom area having a first group of surge arrestors and a low voltage insulation zoom area having a second group of surge arrestors. The surge arrestors in the first group have a first arrestor reference voltage and the surge arrestors in the second group have a second arrestor reference voltage that is lower than the first arrestor reference voltage.

An improved electric circuit structure for short circuit protection is applicable to examining a device under test, comprising a circuit breaking element, a thermistor, a filtering and rectifying module and a capacitor. A first end of the circuit breaking element is connected to a power source. The filtering and rectifying module is connected to a second end of the circuit breaking element, a ground, a first end of the thermistor and a first end of the capacitor. A second end of the capacitor is connected to a second end of the thermistor. The capacitor is connected in parallel with the device under test. The circuit breaking element disclosed in the present invention is a ceramic tube fuse and forms an open circuit when the device under test forms a short circuit. Meanwhile, the ceramic tube fuse withstands voltage between its first and second end without generating any physical damage.

One or more embodiments provide a power module that includes a high-side power transistor; a low-side power transistor coupled to the high-side power transistor, the low-side power transistor including a first load path terminal through which a load current enters the low-side power transistor and a second load path terminal through which the load current exits the low-side power transistor; a gate driver integrated circuit (IC) configured to drive the high-side power transistor and/or the low-side power transistor; a leadframe having a low-side voltage pin configured to be coupled to a low-side voltage source; a surge voltage limiting element coupled between the second load path terminal of the low-side power transistor and the low-side voltage pin; and a module package, where the high-side power transistor, the low-side power transistor, the gate driver IC, the leadframe, and the surge voltage limiting element are encapsulated in the module package.