Systems and methods are provided for 8-channel surge protection for a network utilizing Power Over Ethernet (PoE). Four Bob Smith terminations are arranged such that one Bob Smith termination is coupled to each of four PoE nodes. Each Bob Smith termination includes a capacitor and a resistor pair coupled in series between its respective PoE node and a respective Bob Smith termination node, wherein a first pair of the Bob Smith terminations is connected between their respective PoE nodes and a first Bob Smith node and a second pair of the Bob Smith terminations is connected between their respective PoE nodes and a second Bob Smith node. The first Bob Smith node is capacitively isolated from ground via a first terminating capacitor component and a second Bob Smith node is capacitively isolated from ground via a second terminating capacitor component separate from the first terminating capacitor component.

A surge protection device includes: an impedance device, a voltage-limiting surge protector, and a switching surge protector. The impedance device is connected in parallel with the voltage-limiting surge protector. A parallel branch of the impedance device and the voltage-limiting surge protector is connected in series with the switching surge protector to form a discharge channel of a lightning impulse current. A series branch of the impedance device and the switching surge protector forms a discharge channel of a follow current. The surge protection device and system of the present invention can effectively improve the capability to withstand multiple pulses and prevent failure of arc-quenching.

An overvoltage protection device includes a first electrode member, a second electrode member, and a varistor assembly. The varistor assembly includes: a plurality of varistor wafers each formed of a varistor material; and at least one electrically conductive interconnect member connecting the varistor wafers in electrical parallel between the first and second electrode members. The varistor wafers are axially stacked between the first and second electrodes.

A method forms an air gap metal tip structure for (ESD) protection. The method forms an air chamber, from an upper substrate and a lower substate disposed below the upper substrate, within which a first metal tip and a second metal tip are disposed. The first and second metal tips are disposed along at least one horizontal axis parallel to the upper and lower substrates. The chamber includes a portion between points of the metal tips, such that oxygen trapped in the chamber is converted into ozone responsive to an arc between the metal tips to dissipate the arc, and the ozone is decomposed back into the oxygen responsive to an arc absence between the metal tips to maintain the ESD protection for subsequent arcs. An under fill level is disposed between the lower and upper substrates, and above one or more layers having the first and second metal tips.

A surge protective device includes a first electrode terminal and a second electrode terminal; n gap units, connected in series between the first electrode terminal and the second electrode terminal sequentially, where a common terminal is formed between adjacent gap units; k first trigger circuits, the k first trigger circuits each include a first terminal connected to one of the common terminals, and a second terminal connected to the second electrode terminal; and m second trigger circuits, the m second trigger circuits each include a first terminal connected to one of the common terminals, and a second terminal connected to the first electrode terminal, where any one of the common terminals is connected only to either the first terminal of one of the first trigger circuits or the first terminal of one of the second trigger circuits.

An embodiment includes an output circuit with transistors and a withstand voltage protection circuit. The withstand voltage protection circuit includes resistors connected between an output signal terminal on the positive phase side and an output signal terminal on the negative phase side. A switch includes an NMOS transistor having a gate terminal connected to the connection point of the resistors, a drain terminal connected to the bias voltage, and a source terminal connected to the base terminal of the transistor.

Methods and systems capable of launching signal-carrying transverse electromagnetic waves onto a transmission line in the higher voltage region of the transmission distribution network. Such methods and systems may include a surface wave launcher located in the higher voltage region, a network unit located in a lower voltage region, and an arrester separating the surface wave launcher and the network unit, the arrester preventing voltage from arcing over from the higher voltage region to the lower voltage region where the arrester provides the signal to the surface wave launcher.

Apparatus and methods for characterizing electrical components for evaluating performance in a high voltage transient protection circuit. Impedance graphs provided by manufacturers for electrical components are typically low voltage measurements that do not necessarily accurately reflect component performance at high voltages above 150 volts. It is important to characterize and understand the behavior of these components at high voltages in order to ensure the components will protect circuitry as expected. In certain embodiments, a characterization method includes obtaining time domain voltage measurements from two terminals of a device under test (DUT) as it is exposed to high voltage transients from an electrical fast transient (EFT) generator. The time domain voltage data is transformed into frequency domain voltage data using a transform algorithm, and additional analysis is performed to derive scattering parameters, impedance, and other valuable metrics for component characterization.

An electrical connector provided with a varistor, and to a protection device for incorporation into an electrical connector and having a varistor comprising at least two pins including a first pin which is a live (502) or neutral (504) pin and a second pin which is an earth pin (506), the first and second pins (502, 504, 506) extending through respective apertures (512) in a varistor plate (514) which has first and second faces, wherein a first conductive layer on the first face of the varistor plate (514) connects electrically to the first pin (502, 504) and a second conductive region on the second face of the varistor plate connects electrically to the second pin (506), so that in response to an excessive voltage across the first (502, 504) and second (506) pins the varistor plate will conduct electricity between the first (502, 504) and second (506) pins. The arrangement can easily be adopted in connectors conforming to existing standards, such as existing mains electrical plugs (500).

An apparatus includes a surge protection device, a current sensor configured to sense a current through the surge protection device, and a surge discriminator circuit coupled to the current sensor and configured to discriminate among a plurality of surge levels for the surge protective device responsive to the sensed current. The current sensor may include a current transformer configured to generate a secondary current responsive to the sensed current and the surge discriminator circuit may be configured to discriminate among a plurality of surge levels responsive to the generated secondary current.