A resonant converter controller circuit is provided. Each period in drive control has a drive time interval and a pause time interval for driving/pausing the resonant converter. The resonant converter controller circuit includes a first oscillating means for generating a clock signal, a second oscillating means for generating a sawtooth wave signal, a third oscillating means for generating a rectangular wave signal, comparison means for outputting a comparison signal indication the rive time interval, by comparing the sawtooth wave signal with a threshold signal, which is generated based on a difference voltage between an output voltage of the resonant converter and a target voltage, and which indicates a ration of the drive time interval to the pause time interval, and a logical operation means for generating a drive control signal based on the comparison signal and the rectangular wave signal to drive and control the resonant converter.

A switching control circuit that controls switching of a switching device, the switching control circuit includes a frequency modulation circuit that generates an oscillator signal, and modulates a frequency of an oscillator signal with a predetermined frequency and a modulation index of two or more, and a drive circuit that drives the switching device in response to a signal corresponding to the modulated oscillator signal, the predetermined frequency being higher than a frequency indicative of a value that is a quarter of a half width of a bandpass filter used for measuring noise generated when the switching device is driven.

A computational current sensor, that enhances traditional Kalman filter based current observer techniques, with transient tracking enhancements and an online parasitic parameter identification that enhances overall accuracy during steady state and transient events while guaranteeing convergence. During transient operation (e.g., a voltage droop), a main filter is bypassed with estimated values calculated from a charge balance principle to enhance accuracy while tracking transient current surges of the DC-DC converter. To address the issue of dependency on a precise model parameter information and further improve accuracy, an online identification algorithm is included to track the equivalent parasitic resistance at run-time.

A power supply device includes: “m×n” switching elements; capacitors connected in series to corresponding ones of the switching elements and forming “m×n” series circuits; a charger charging the capacitors; “m” transformers in which primary windings are connected to both ends of corresponding ones of “m” parallel circuits formed by connecting “n” units of the series circuits in parallel to one another with the polarity aligned; a current detection unit detecting, as a detected current value, current flowing through a multistage series circuit in which secondary windings of the transformers are sequentially connected in series so that both ends of the circuit serve as output terminals; a control unit outputting a command signal generated based on the detected current value and a current command being a target value of the current output from the output terminals; and a drive unit driving the switching elements and the charger based on the command signal.

A circuit includes a controller circuit configured to receive an output voltage of a converter and adjust a switching frequency of the converter in response to a status of an output load and an output load sensing circuit configured to determine the status of the output load and provide the peak current to the controller circuit. The output load sensing circuit may include a first timer configured to provide a delayed first signal to a peak current control in response to the output load being a heavy load. A second timer may be configured to provide a delayed second signal to the peak current control in response to the output load being a light load. The peak current control may be configured to adjust a peak current based on the received first signal and the second signal and configured to provide the peak current to the controller circuit.

Disclosed herein is a method for controlling an electrical converter system that includes: determining a nominal pulse pattern (t.sub.p,i*, Δu.sub.p,i*) and a reference trajectory (x*) of at least one electrical quantity of the electrical converter system over a horizon of future sampling instants, the nominal pulse pattern (t.sub.p,i*, Δu.sub.p,i*) comprises switching transitions (Δu.sub.p,i*) between output voltages of an electrical converter of the electrical converter system and the reference trajectory (x*) indicates a desired future development of an electrical quantity of the converter system; determining a small-signal pulse pattern (ũ.sub.abc(t, λ.sub.p,i)) by minimizing a cost function; determining a modified pulse pattern (t.sub.opt,p,i, Δu.sub.p,i) by moving the switching transitions of the nominal pulse pattern (t.sub.p,i*, Δu.sub.p,i*) to generate modified switching transitions; and applying at least the next switching transition of the modified pulse pattern (t.sub.opt,p,i, Δu.sub.p,i) to the electrical converter system.

The systems and methods described herein involve a power converter control system that uses a physical or virtual memristor in place of a standard resistor at a filtering stage of the power converter. The memristive low pass filter adjusts a cutoff frequency based on the output voltage in a way such that adaptive response to transient features is achieved. The use of the physical or virtual memristor provides the benefit of producing a self-adaptive passband rather than requiring manual intervention from a user. The result is an improvement in the output power quality of the power converter, which may allow for usage of the power converter, even given significant component degradation.

A circuit comprising a first capacitor configured to be charged to a voltage representing state information of a compensator, a second capacitor, a buffer circuit configured to charge the second capacitor to a voltage substantially equal to that of the first capacitor and a switching network configured to transition between a first state and a second state. When the switching network is in the first state, the second capacitor is charged to the voltage across the first capacitor. When the switching network is in the second state, the buffer circuit is disconnected from the second capacitor and the first capacitor and the second capacitor are connected in parallel.

An input voltage estimate circuit for use in a power converter. The input voltage estimate circuit comprises a timer, which comprises a timer control circuit to generate a control signal in response to a request signal, a winding signal, and an output voltage signal. The control signal is coupled to transition to a first logic level in response to a request event in the request signal, and to transition to a second logic level in response to the winding signal falling below the output voltage signal. The timer comprises a primary conduction timer to generate a primary conduction time signal in response to the first logic level and the second logic level in the control signal and a secondary conduction timer to generate a secondary conduction time signal in response to the second logic level in the control signal and a second logic level in a second drive signal.

A method for controlling a current associated with a power converter may comprise controlling the current based on at least a peak current threshold level for the current and a valley current threshold level for the current, and further controlling the current based on a duration of time that the power converter spends in a switching state of the power converter.