A method for validating operation of a driver integrated circuit includes providing a signal using an output node. The signal is provided using multiple set points in response to a change in state of an input signal. Each set point corresponds to a different phase of a multi-phase transition of the signal. The method includes providing a timer value at an end of a phase of the multi-phase transition and determining whether the signal is in a target signal range of the phase based on the timer value at the end of the phase, a predetermined value defining the target signal range of the phase, and a predetermined time limit for the phase. A current through the output node may be provided using the multiple set points, and a voltage on the output node may have the multi-phase transition.

A power converter having a slew rate controlling mechanism is provided. A first terminal of a high-side switch is coupled to an input voltage. A first terminal of a low-side switch is connected to a second terminal of the high-side switch. A second terminal of a first capacitor is connected to a node between the second terminal of the high-side switch and the first terminal of the low-side switch. A first terminal of an inductor is connected to the second terminal of the first capacitor and to the node. A first terminal of a second capacitor is connected to a second terminal of the inductor. A second terminal of the second capacitor is grounded. An input terminal of a current controlling device is connected to a power output terminal of a high-side buffer. An output terminal of the current controlling device is connected to the node.

A classification circuit generates first information for classifying an operating state of a power semiconductor element into one of a plurality of predetermined operating regions. A selector circuit generates second information for selecting a plurality of modes with different switching speeds, based on a user input. A characteristic control circuit stores a drive adjustment signal in advance for each of combinations of the operating regions and the modes and outputs the drive adjustment signal in a combination of one operating region and one mode that is selected in accordance with the first information and the second information. A gate drive circuit charges/discharges a gate at a charge rate and a discharge rate variably set in accordance with the drive adjustment signal from the characteristic control circuit, at the time of on/off of the power semiconductor element.

A method of balancing voltage distribution over a plurality of switches connected in series with each other in a high voltage (HV) switch is provided. A snubber arrangement is associated with each switch of the plurality of switches. The method includes, for a first snubber arrangement associated with a first switch of the plurality of switches, determining a first voltage across a first snubber energy storage component of the first snubber arrangement associated with the first switch. The method further includes, for a second snubber arrangement associated with a second switch of the plurality of switches, determining a second voltage across a second snubber energy storage component of the second snubber arrangement associated with the second switch. The method further includes comparing the first voltage and the second voltage and, based on the comparison, adjusting a first drive signal of at least the first switch based on the first voltage.

A switching mode power supply with improved power balance is discussed. It has a transformer, a primary circuit having a primary power switch coupled to a primary side of the transformer, and a plurality of secondary circuits coupled in parallel with each other at a secondary side of the transformer. A plurality of output voltages are provided at each of the secondary circuits; and each of the secondary circuits has a secondary power switch. If any of the output voltage deviates from a reference voltage, an ON time length of the corresponding secondary power switch is extended.

A switching element drive device that reduces a switching loss while suppressing noise with an inexpensive configuration, is provided. The switching element drive device includes a current sensor configured to measure a load current flowing through a load, a voltage sensor configured to measure an input voltage inputted from a power supply, and a control part configured to output a command value of a gate drive voltage to a gate drive voltage supply part, the gate drive voltage supply part being configured to supply the gate drive voltage for driving a switching element disposed between the power supply and the load, wherein the control part is further configured to determine the command value of the gate drive voltage based on the load current and the input voltage.

A system includes a switching converter with an output inductor. The switching converter also includes a switch set with a switch node coupled to the output inductor. The switching converter also includes a first drive stage coupled to the switch set. The switching converter also includes a second drive stage coupled to the switch set. The switching converter also includes a controller coupled to the first drive stage and the second drive stage. The controller includes a supply voltage detector circuit. The controller also includes a level shifter coupled to an output of the supply voltage detector circuit. The controller also includes a selection circuit coupled between the level shifter and the second drive stage.

A drive device driving a power converter that includes a switching element formed from a wide bandgap semiconductor, includes a PWM-signal output unit that generates a drive signal that drives the switching element with PWM; an on-speed reducing unit that, when the switching element is changed from off to on, reduces a change rate of the drive signal; and an off-speed improving unit that, when the switching element is changed from on to off, draws charge from the switching element at a high speed and with a charge drawing performance higher than that at a time when the switching element is changed from off to on.

Provided is an electronic circuit capable of preventing a switching device from breakage when a short-circuit occurs. When a gate control signal CG1 is inverted from an L level to an H level, a first switching circuit 32 selects a first input terminal a, and connects an output terminal d to the first input terminal a, whereby turning on a MOSFET 21. When a predetermined time Tx elapses after the output terminal d of the first switching circuit 32 is connected to the first input terminal a, a second switching circuit 34 selects a first input terminal e, and connects an output terminal g to the first input terminal e. Furthermore, immediately after the connection, the first switching circuit 32 selects a second input terminal b, and connects the output terminal d to the second input terminal b. Consequently, immediately after the MOSFET 21 is turned on, a gate resistor is switched from a first gate resistor 33 having a small resistance value to a second gate resistor 35 having a large resistance value.

Passive filters, line replaceable units and a modular power supply are provided. In one example the modular power supply has a DC bus link having a positive line and a negative line with at least one passive filter and an inductor having a first end and a second end, the first end coupleable to a phase output. A diode bridge having at least a first diode and a second diode, with an anode of the first diode coupleable to the second end of the inductor and a cathode of the first diode coupleable to the positive line, wherein a cathode of the second diode is coupleable to the second end of the inductor and an anode of the second diode is coupleable to the negative line, and wherein the first diode and the second diode are each configured to produce a combined reverse recovery charge that achieves a target DV/DT for an output voltage of the at least one passive filter.