Patent classifications
H02M1/0038
Rectifier capable of adjusting gate voltage of transistor and alternator including rectifier
An alternator and a rectifier are provided. The rectifier includes a gate driving circuit, a logic circuit, and a comparison circuit. The gate driving circuit generates a gate voltage, and a control terminal of a transistor receives the gate voltage. The gate driving circuit receives a control signal, and adjusts the gate voltage according to the control signal, so as to control a conductivity degree of the transistor. The logic circuit generates the control signal and a switch signal according to a comparison result and selects a selected voltage according to the switch signal. The comparison result is generated by comparing a sensing voltage of a first terminal of the transistor with the selected voltage.
SWITCHING MODE POWER SUPPLY PREVENTING FALSE TRIGGERING OF A SWITCH
A switching mode power supply preventing a first switch from being falsely triggered. The switching mode power supply detects a peak of an input signal and starts timing a period of time since the arrival of the peak of the input signal is detected. The first switch starts performing the on and off switching operations when the period of time expires.
Digitally Compensated Current Sensing Protection
An apparatus for controlling a power converter includes an analog-to-digital converter to generate a digital representation of a voltage sense signal indicative of an input voltage of the power converter. The apparatus includes a first comparison circuit to generate a first comparison signal using a current sense signal indicative of a current through a primary-side switch of the power converter. The apparatus includes a gate driver to provide a gate drive signal to the primary-side switch based on a control signal, and a digital controller. The digital controller is configured to produce a time scalar value using the digital representation of the voltage sense signal, produce a timing signal using the control signal and the first comparison signal, scale the timing signal using the time scalar value, and adjust a timing of the control signal to limit a peak current through the primary-side switch based on the scaled timing signal.
POWER CONVERTER, INDUCTOR ELEMENT AND CONTROL METHOD OF PHASE SHEDDING
An N-phase power converter has N phases with outputs connected in parallel and outputs connected in parallel. The converter comprises: N switch units, wherein each phase of the N-phase power converter comprises one of the N switch units; and an integrated inductor unit, comprising M inductor subunits, wherein M is a natural number greater than or equal to 2, each inductor subunit comprises i inductors, i is a natural number greater than or equal to 2, N>Mi or N=Mi, Mi of the inductors in the integrated inductor unit are respectively coupled to Mi of the N switch units, wherein: the i inductors of each of the inductor subunit are inverse-coupled to each other, the coupling coefficient between the M inductor subunits is less than the coupling coefficient between the i inductors in each of the inductor subunits.
SYSTEM AND METHOD TO ENHANCE SIGNAL TO NOISE RATIO AND TO ACHIEVE MINIMUM DUTY CYCLE RESOLUTION FOR PEAK CURRENT MODE CONTROL SCHEME
Systems and methods for providing peak current mode control (PCMC) for power converters. Noise immunity is improved by enhancing the signal-to-noise ratio of an inductor (or switch) current to achieve minimum duty cycle resolution and eliminate subharmonic operation that causes high input and output ripples. Current is sensed and translated to a voltage by a current sense resistor for peak current mode control scheme. A direct current (DC) offset voltage is added only during an on-time of the main switch to increase the signal-to-noise ratio. A leading-edge spike caused by turn-on of the main switch is removed by resetting a filter capacitor of a current sense circuit to zero volts after each switching cycle.
Motor drive device configured to detect capacitor deterioration and to restrict a motor based upon the detected deterioration
A motor drive device includes a storage unit that stores an initial value of a static capacitance correlation value of a static capacitance of a smoothing capacitor in an initial state, when the smoothing capacitor is connected to an inverter. A measurement unit of the motor drive device includes a timing generation circuit and a calculation unit. The measurement unit measures the static capacitance correlation value of the smoothing capacitor as a measured value at a time after the initial state. A determination unit of the motor drive device determines whether there is deterioration in the smoothing capacitor based on a relationship between the measured value and the initial value. A restrictor of the motor drive device restricts a maximum rotation number of a motor when capacitor deterioration is determined, thereby reducing a ripple current, limiting heat generation in the capacitor, and extending the product life of the capacitor, without increasing the number of parts in the motor drive device.
Dual ramp modulation for a switch-mode power supply
A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
PRE-CHARGE CURRENT CONTROL DEVICE
A device for controlling a pre-charge current generated when electrically connecting a first terminal and a second terminal, according to one embodiment of the present invention, may comprise: a switch for controlling a magnitude of a current flowing between the first terminal and the second terminal; a first resistor for generating a base voltage of a first transistor in proportion to a magnitude of the pre-charge current flowing between the first terminal and the second terminal; the first transistor for limiting the magnitude of the pre-charge current when a voltage generated by the first resistor is equal to or greater than a predetermined threshold voltage; a photocoupler for receiving, in a state insulated from a first power source, an optical signal from the first power source and supplying power; a capacitor charged by the power supplied by the photocoupler; a second transistor for controlling the magnitude of the pre-charge current on the basis of a charging voltage of the capacitor; and a second resistor for controlling an operating time of the second transistor along with the capacitor.
Control of pulse generator in driving control device
A circuit for controlling a power converter includes a pulse generator generating a first pulse signal and a second pulse signal in response to an input signal, the first pulse signal being asserted at a given time interval or thereafter after the input signal has been de-asserted, a level-shift circuit shifting a level of the first pulse signal to generate a first shifted signal and to shift a level of the second pulse signal to generate a second shifted signal, a logic circuit controlling a first-side switching device in response to the first and second shifted signals, and an output node outputting an output signal. The first-side switching device is coupled to a second side-switching device at the output node.
Power converter, inductor element and control method of phase shedding
An N-phase power converter has N phases with outputs connected in parallel and outputs connected in parallel. The converter comprises: N switch units, wherein each phase of the N-phase power converter comprises one of the N switch units; and an integrated inductor unit, comprising M inductor subunits, wherein M is a natural number greater than or equal to 2, each inductor subunit comprises i inductors, i is a natural number greater than or equal to 2, N>Mi or N=Mi, Mi of the inductors in the integrated inductor unit are respectively coupled to Mi of the N switch units, wherein: the i inductors of each of the inductor subunit are inverse-coupled to each other, the coupling coefficient between the M inductor subunits is less than the coupling coefficient between the i inductors in each of the inductor subunits.