A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

In the field of gate drivers there is provided a regulated voltage source (10; 10A, 10B), for a gate driver (200; 300) of a switching device (18) having a gate terminal (26) via which the switching device (18) can at least be turned on. The regulated voltage source (10; 10A, 10B) comprises an input terminal (12) via which the regulated voltage source (10; 10A, 10B) in use receives current. The regulated voltage source (10; 10A, 10B) also includes first and second connection terminals (22, 24) via at least one of which the regulated voltage source (10; 10A, 10B) in use applies a voltage (V) to a gate terminal (26) of a switching device (18). In addition the regulated voltage source (10; 10A, 10B) includes a regulated energy storage stage (28) which is electrically connected between the input and output terminals (12, 22, 24) and which includes a primary energy storage device (30; 30A, 30B) connected in parallel with a storage limiter (34) to limit the amount of energy stored in the primary energy storage device (30; 30A, 30B). Between the primary energy storage device (30; 30A, 30B) and the storage limiter (34) lies an energy retainer (46) to prevent the escape of energy from the primary energy storage device (30; 30A, 30B) via the storage limiter (34). The regulated voltage source (10; 10A, 10B) further includes a freewheel diode (50) that is arranged in parallel with the energy storage stage (28) and a secondary energy storage device (52; 52A, 52B) which is arranged in parallel with each of the freewheel diode (50) and the energy storage stage (28).

The present application discloses a multi-path resonant circuit and a resonant converter. The multi-path resonant circuit includes at least two parallel N-phase resonant circuits, wherein N is an integer greater than or equal to 3. The at least two parallel N-phase resonant circuits include a first N-phase resonant circuit and a second N-phase resonant circuit. A first resonant inductor in any phase resonant circuit of the first N-phase resonant circuit is coupled with a second resonant inductor in any phase resonant circuit of the second N-phase resonant circuit. In this way, current sharing of the multi-path resonant circuit can be realized through a simpler structure.