A method for monitoring a change in a capacitance in an electric system, and an electric system comprising a multilevel inverter and at least two capacitances connected in series between a negative DC pole and a positive DC pole of the inverter, wherein the connection point between the capacitances is connected to one of the at least one middle DC pole of the inverter, and a controller configured to provide by the inverter an AC current component to one of the at least one middle DC pole of the inverter, which AC current component is distributed between the two capacitances connected to the middle DC pole, and monitor resulting AC voltage components in the two capacitances, and determine on the basis of a difference between the monitored AC voltage components a change in at least one of the two capacitances.

A surge current compensating circuit has a compensating current generation unit, a bias unit, and a switch unit, for compensating a surge current drawn from a supply power after an output signal of a specific circuit transits. The compensating current generation unit is electrically coupled to the output stage of the specific circuit. The bias unit is electrically coupled to the compensating current generation unit through the switch unit. Before the output signal transits, the switch unit is disabled and the compensating current generation unit is enabled, so as to draw the compensating current from the supply power. After the output signal transits, the switch unit is enabled and the compensating current generation unit is disabled, such that the compensating current is not drawn from the supply power.

An active clamp flyback converter includes a low-side switch that serves as a power switch and a high-side switch that serves as a clamp switch. The high-side switch is operated in one of two active clamp switching modes, which is selected based on load condition. In a complementary active clamp mode, the switching frequency of the low-side switch is decreased as the load increases. In a modified active clamp mode, the high-side switch is turned on in a same switching cycle first by zero voltage switching (ZVS) and second by quasi-resonant switching (QRS), with a QRS blanking time being increased as the load decreases. A ZVS delay time and dead time between switching are adaptively set based on a duty cycle of the low-side switch. The output voltage of the active clamp flyback converter is sensed from an auxiliary voltage of an auxiliary winding of the transformer.

A power conversion apparatus includes a main circuit unit, a control unit, a current sensor, and a half-wave rectifier unit. The control unit includes current frequency calculation units and monitoring units. The current frequency calculation units calculate current frequencies based on at least either the rising timing or falling timing of current detection signals half-wave rectified by the half-wave rectifier unit. The monitoring units monitor the speed of a motor based on the current frequencies calculated by the current frequency calculation units.

The disclosure relates to a control circuit and control method of a DC/DC converter, and a power management circuit. A control circuit of a DC/DC converter with a stable switching frequency is provided. An on-time generating circuit asserts a turn-off signal after an on time has elapsed from turning-on of a switching transistor. A charging circuit charges a capacitor with a charging current corresponding to an input voltage of the DC/DC converter. A frequency stabilizing circuit generates a control signal such that a switching frequency of the switching transistor approximates a reference frequency. A second comparator compares a slope voltage generated in the capacitor with the threshold voltage corresponding to the control signal, and generates the turn-off signal according to a comparison result.

A control signal generator includes an error amplifier, a first comparator, a second comparator, a logic circuit and a pulse generator. The error amplifier has a first output, a first input, a second input and a first snooze input. The first comparator has a second output, a third input and a fourth input. The third input is coupled to the first output. The second comparator has a third output, a fifth input, a sixth input and a second snooze input. The fifth input is coupled to the third input. The logic circuit has a fourth output and logic circuit inputs, including a first logic circuit input coupled to the second output. The pulse generator has a fifth output and a seventh input. The seventh input is coupled to the fourth output. A snooze mode controller has a sixth output coupled to the first snooze input and the second snooze input.

A flyback power-converting device includes a transformer circuit, a clamp damping circuit, a first switch, a voltage-reducing circuit and a second switch. The clamp damping circuit and the first switch are coupled to the transformer circuit. The voltage-reducing circuit and the second switch are coupled in series between the clamp damping circuit and the transformer circuit. Through switching of the first switch, the transformer circuit converts an input power to generate a first converted voltage and to enable the clamp damping circuit to store an inductive energy. In addition, when the second switch is turned on, the clamp damping circuit releases the inductive energy to the transformer circuit via the voltage-reducing circuit, so that the transformer circuit generates a second converted voltage according to the inductive energy.

A resonant half-bridge flyback power converter includes: a power transformer and a resonant capacitor which are coupled in series between a half-bridge power stage and an output power; and a primary controller circuit controlling a high side power switch and a low side power switch of the half-bridge power stage. When the high side switch is OFF, the control signal of the low side power switch includes a resonant switching pulse for achieving resonant switching of the low side switch and a soft switching pulse for achieving ZVS of the high side switch. When the output power is lower than a delay threshold, the primary controller circuit determines a delay period which is between the resonant switching pulse and the soft switching pulse to control both the high side power switch and the low side power switch to be OFF. The delay period is negatively correlated with the output power.

The present disclosure relates to an operating circuit suitable for operating a liquid crystal device, the circuit including a means for supplying unsmoothed DC from an AC source to a switching circuit, wherein the switching circuit has an output, and means for operating the switching circuit to provide at least two alternative frequencies at the output.

A single-stage power converter can include a boost segment configured to receive an input DC voltage and a flyback segment configured to generate an output DC voltage. The boost and flyback segments may share common switching devices, including a main switch and an auxiliary switch. The boost segment can further include a boost inductor. The flyback segment can further include a bulk capacitor, a resonant capacitor, a flyback transformer, and an output rectifier. The flyback segment can still further include a resonant inductance in addition to a primary winding of the flyback transformer, which may be a parasitic inductance and/or a discrete inductor. The converter can further include control circuitry configured to vary timing, frequency, and/or duty cycle of the main switch to regulate the output voltage. The converter can still further include a rectifier configured to receive an AC input voltage and produce the DC input voltage.