A power converter includes a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter.

A controller for a boost power factor correction (PFC) converter. The controller is configured to operate the boost PFC converter in multiple operating modes, including a continuous conduction mode (CCM), a transition mode (TM), and a hybrid mode in which the controller operates the converter in both CCM and TM within a same line cycle. An example controller includes a current control loop and a mode transition circuit. The current control loop is configured to compute an inductor current for each of first and second operation modes, based on a current sample taken, for example, during a boost synchronous rectifier conduction period of the converter. The mode transition circuit includes digital logic circuitry and is configured to generate a pulse indicating that one, two or all three of: zero-voltage switching (ZVS) has been achieved; the synchronous rectifier conduction period is active; and/or one of TM or hybrid mode is active.

The present disclosure provides a control circuit to power a load, the circuit generally comprising a first switch such as a TRIAC to switch on and off and power the load based upon user demand. The circuit is also comprised of a second connected in parallel with the TRIAC, the second switch switching to a conducting state at a zero-crossing of the source before becoming completely saturated. Once the second switch is saturated, the first switch switches from a non-conducting state to a conducting state, which minimizes conducted EMI generated in the circuit.

The invention provides a gate drive device, a gate drive method, a power semiconductor module, and an electric power conversion device capable of reducing a negative gate surge voltage. The gate drive device drives a semiconductor device constituting an arm in an electric power conversion device. Before a turn-off start of a drive arm, in a counter arm, a voltage between one main terminal of the semiconductor device and a gate terminal of the semiconductor device is charged to a voltage value that is larger, in a positive direction, than a negative voltage of a negative gate power supply and smaller than a gate threshold voltage of the semiconductor device.

A power adapter, includes: a transformer, including a primary winding and a secondary winding; a primary circuit, including a primary main switch, electrically coupled to the primary winding; a secondary circuit, including a first switch unit and a second switch unit; a first end of the first switch unit and a first end of the second switch unit are coupled to the secondary winding of the transformer, and a second end of the first switch unit and a second end of the second switch unit connected to a first output port and a second output port, respectively; a control circuit, configured to detect output voltages of the first output port and the second output port, and controlling the primary main switch, the first switch unit and the second switch unit to adjust the output voltages of the first output port and the second output port.

Systems and methods of this disclosure use low voltage energy storage devices to supply power at a medium voltage from an uninterruptible power supply (UPS) to a data center load. The UPS includes a low voltage energy storage device (ultracapacitor/battery), a high frequency (HF) bidirectional DC-DC converter, and a multi-level (ML) inverter. The HF DC-DC converter uses a plurality of HF planar transformers, multiple H-bridge circuits, and gate drivers for driving IGBT devices to generate a medium DC voltage from the ultracapacitor/battery energy storage. The gate drivers are controlled by a zero voltage switching (ZVS) controller, which introduces a phase shift between the voltage on the primary and secondary sides of the transformers. When the primary side leads the secondary side, the ultracapacitor/battery discharges and causes the UPS to supply power to the data center, and when the secondary side leads the primary side, power flows from the grid back to the UPS, thereby recharging the ultracapacitor/battery.

The present invention discloses a charging power supply circuit and a control method thereof, the charging power supply circuit includes a PFC circuit, a driver module, and a high-voltage output circuit and a low-voltage output circuit both connected to said PFC circuit, wherein the PFC circuit is connected to AC mains, and the drive module is used to set the operation range of said PFC circuit to the range near the zero point of AC input voltage. Using the technical solution of the present invention can achieve keeping the topology on the demand for isolation and reduce the volume and cost of PFC circuits.

A gate drive circuit of a wide band gap power device (IGBT) includes a buffer, a di/dt sensing network, a turn-on circuit portion and turn-off circuit portion. The buffer, responsive to turn-on, supplies a first current via the first current path to the gate of the IGBT, and responsive to turn-off ceases the supply of the first current. The di/dt sensing network receives a feedback control signal representative of a voltage measurement across a parasitic inductance that exists between a Kelvin emitter and a power emitter of the The turn-on circuit portion, responsive to turn-on and a parasitic inductance of zero volts, supplies a second current via a second current path to the gate of the IGBT. The turn-off circuit portion, responsive to turn-off and a parasitic inductance of zero volts, discharges a gate capacitance of the IGBT through both the first current path and a third current path.

An AC-AC converter can include a stack of four switches. An input of the converter can be coupled across the stack of four switches, and an output of the converter can be taken from first terminal coupled to a connection point of first and second switches of the stack and a second terminal coupled to a connection point of third and fourth switches of the stack. The converter can further include a controller that operates the switches such that during a positive half cycle of an AC input voltage, the first and second switches are operated with an alternating 50% duty cycle and the third and fourth switches are constantly on, and during the negative half cycle of the AC input voltage, the third and fourth switches are operated with an alternating 50% duty cycle and the first and second switches are constantly on.

A controller configured for use in a power converter. The controller includes a control circuit coupled to receive an input line voltage sense signal representative of an input voltage of the power converter. The control circuit is configured to generate a control signal in response to a request signal representative of an output of the power converter. The control signal represents a delay time to turn on a power switch after a turn on of a clamp switch in response to the input line voltage sense signal. The control circuit can further generate a clamp drive signal to control a clamp driver and a drive circuit configured to generate a drive signal to control the power switch to transfer energy from an input of the power converter to the output of the power converter.