The technology described in this document can be embodied in an apparatus that includes an amplifier that includes a first Zeta converter connected to a power supply and a load. The amplifier also includes a second Zeta converter connected to the power supply and the load. The second Zeta converter is driven by a complementary duty cycle relative to the first Zeta converter. The amplifier also includes a controller to provide an audio signal to the first Zeta converter and the second Zeta converter for delivery to the load.

A switching power supply comprises a power converter having a transformer, a low side switch configured to draw current from a supply voltage through a primary winding of the transformer and a high side switch configured to couple the primary winding of the transformer to a snubber capacitor. A controller is configured to synchronously control the opening and closing of the low side switch to form a regulated output voltage. A first voltage is generated at a node between the low side switch and the high side switch. The controller is further configured to open the high side switch during each switching cycle when the first voltage reaches a determined level. The determined level is higher than the supply voltage by an amount that is adjusted dependent on a monitored level of the supply voltage.

A soft switching resonant converter is disclosed. The converter includes a power switch operable to connect and disconnect a DC link rail node and an output node. A resonant capacitor is coupled with the power switch. An auxiliary leg is coupled with a DC link midpoint node and the output node. An active damper is coupled in series with the resonant capacitor and the output node and is controllable to provide a first resistance of the active damper in a first state and a second resistance of the active damper in a second state, the first resistance having a lower magnitude than the second resistance. A driver controls the damper switch to provide a first resistance during the soft switching operation of the power switch and a second resistance after the soft switching operation of the power switch.

A switching mode power supply disables a ZCD function when the AC input voltage has a voltage value close to a voltage value of the output voltage, so that instable zero crossing detection issues are eliminated.

The invention discloses systems (100) and methods (200, 300) for reducing the effect of even-order harmonics in supply voltage on the DC side components in AC-DC converters having any kind of controlled power electronic switches or their combinations. The method involves modifying the time of firing the various switches (112, 114) through a control logic arrives at through either measuring or estimating the DC bus voltage or the input AC voltage. The proposed control methods are useful in ASDs where full bridge configuration is used for AC to DC conversion. The proposed control may also be used in ASDs where a half bridge rectifier system is used. The proposed method reduces the stress on the DC bus capacitor and increases the lifetime of the capacitor. It further reduces the peak current through the device, which reduces stress on the rectifier components. It also reduces the Total Harmonic Distortion (THD.sub.i) of the line current.

A switching mode power supply with zero voltage switching is discussed. It adopts a primary control circuit to turn on a primary switch circuit when a current flowing through the primary switch circuit reaches an inverse current threshold or when a variation rate of a voltage signal indicative of a voltage across the primary switch circuit reaches a rate threshold.

The present disclosure discloses a power transforming apparatus capable of reducing a stress of a converter switch during a PFC operation, an operation method thereof, and an air conditioner including the same. To this end, the power transforming apparatus according to the present disclosure may determine the number of converters for performing a PFC operation based on a magnitude of input power and a speed of the motor. Furthermore, target converter channels are arbitrarily selected using a random function at an initial stage of a PFC operation so as not to add a stress to a switch device of any one converter. In addition, in order to disperse a stress to all switches, phases are individually controlled to perform switching operations while changing converters that match the number of converters for performing a PFC operation in a preset cycle, for example, whenever a zero-crossing is detected.

A series-parallel switched capacitor voltage converter includes inductive branch, a first branch and a second branch, the inductive branch is connected between the first branch and the second branch. By controlling turning on and off of the switches of the first branch, the second branch and inductive branch, charges on capacitors of one branch are completely transferred to another branch via the inductive branch within a period of time after all main switches of the first branch and the second branch are turned off, and a voltage difference between both terminals of each of the main switches becomes zero, then each of the main switches is started to be turned on, the voltage difference of each of the main switches is zero at an instant when the main switches are turned on.

A biphasic Dickson switched capacitor converter includes an auxiliary circuit, a first branch and a second branch, the auxiliary circuit is connected between the first branch and the second branch, and electric charges at one of the first branch and the second branch are transferred to another of the first branch and the second branch by controlling the auxiliary circuit during a dead time when primary power transistors are turned off to realize the primary power transistors turn on at zero voltage and reduce a switching loss.

A control circuit includes an output terminal configured to be coupled to a control terminal of a transistor that has a current path coupled to an inductor; a transconductance amplifier configured to produce a sense current based on a current flowing through the current path of the transistor; and a first capacitor. The control circuit is configured to turn on the transistor based on a clock signal, integrate the sense current with an integrating capacitor to generate a first voltage, generate a second voltage across the first capacitor based on a first current, generate a second current based on the second voltage, generate a third voltage based on the second current, turn off the transistor when the first voltage becomes higher than the third voltage; discharge the integrating capacitor when the transistor turns off; and regulate an average output current flowing through the inductor based on the first current.