Technologies for alternating current regulation controller include a controller configured to determine a voltage duty cycle based on a target voltage, and to determine a delay time based on the voltage duty cycle. The controller is coupled to input phases of an alternating current generator having multiple phases. Each phase is coupled to a silicon controlled rectifier. For each phase, the controller identifies a rising edge asserted on the input phase, waits the delay time after identifying the rising edge, and asserts an output pulse on an output driver coupled to the silicon controlled rectifier coupled to the input phase in response to waiting the delay time. Other embodiments are described and claimed.

A power converter includes a plurality of power stages configured to generate an output current that has an output voltage based on an input current that as an input voltage a control circuit coupled to the plurality of power stages. The control circuit is configured to control operation of the plurality of power stages. The control circuit includes a plurality of constant-on-time loops for the plurality of power stages. The power converter is configured to operate in a single-phase mode or a multiphase mode. A first power stage of the plurality of power stages supports a continuous conduction mode and a discontinuous conduction mode when the power converter operates in the single-phase mode.

A system for an inverter includes a first integrated circuit configured to: provide power to a first set of switches, and selectively control the first set of switches and a second set of switches; a second integrated circuit configured to provide power to the second set of switches; and an electric motor being connected to the first set of switches and the second set of switches, wherein, the second integrated circuit is further configured to: in response to an a fault detected in the first integrated circuit, selectively control the first set of switches and the second set of switches, and, in response to at least one voltage value corresponding to a voltage of the first set of switches being outside of a threshold, performing a safe state operation.

A multiphase converter is disclosed. The multiphase converter comprises multiple phase legs. Each leg has a combination of power semiconductors. The multiphase converter further comprises a terminal current sensor configured to generate output signals indicating a terminal current flowing through the multiphase converter. The multiphase converter further comprises a plurality of current sensors configured to generate output signals indicating low side switch phase current of each phase leg. The multiphase converter further comprises a low pass filter for filtering out high frequency component of the low side switch current signal for each phase leg.

A multiphase converter is disclosed. The multiphase converter comprises multiple phase legs. Each leg has a combination of power semiconductors. The multiphase converter further comprises a terminal current sensor configured to generate output signals indicating a terminal current flowing through the multiphase converter. The multiphase converter further comprises a plurality of current sensors configured to generate output signals indicating low side switch phase current of each phase leg. The multiphase converter further comprises a low pass filter for filtering out high frequency component of the low side switch current signal for each phase leg.

This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.

A power converter circuit included in a computer system that regulated a power supply voltage used by other circuits in the computer system. The power converter includes a primary control circuit that selectively activates multiple phase circuits coupled to respective driver circuits, which are coupled to a power supply node via respective inductors. Some of the driver circuits are located on a separate integrated circuit from the primary control circuit and the multiple phase circuits.

A power converter circuit included in a computer system that regulated a power supply voltage used by other circuits in the computer system. The power converter includes a primary control circuit that selectively activates multiple phase circuits coupled to respective driver circuits, which are coupled to a power supply node via respective inductors. Some of the driver circuits are located on a separate integrated circuit from the primary control circuit and the multiple phase circuits.

A gate voltage control/gate resistance changing circuit (21) is accommodated in the same package (P1) as a switching element (11), and outputs a driving signal to the switching element (11) to control turning on and off of the switching element (11). When an external signal is input from outside of the package (P1) to a terminal (3c) of the package (P1), a changing unit (221) accommodated in the package (P1) changes the switching speed of the switching element (11) based on the signal.

A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.