Controllability of an oscillator circuit is improved. The oscillator circuit has inverters in odd-numbered stages. A circuit is electrically connected to a power supply node of the inverters to which a high power supply potential is input. The circuit includes a first transistor, a second transistor, and a capacitor. The first transistor includes an oxide semiconductor in its channel. A holding circuit including the first transistor and the capacitor has a function of holding an analog potential that is input from the outside. The potential held by the holding circuit is input to a gate of the second transistor. A power supply potential is supplied to the inverters through the second transistor, so that the delay time of the inverter can be controlled by the potential of the gate of the second transistor.

Controllability of an oscillator circuit is improved. The oscillator circuit has inverters in odd-numbered stages. A circuit is electrically connected to a power supply node of the inverters to which a high power supply potential is input. The circuit includes a first transistor, a second transistor, and a capacitor. The first transistor includes an oxide semiconductor in its channel. A holding circuit including the first transistor and the capacitor has a function of holding an analog potential that is input from the outside. The potential held by the holding circuit is input to a gate of the second transistor. A power supply potential is supplied to the inverters through the second transistor, so that the delay time of the inverter can be controlled by the potential of the gate of the second transistor.

A nano-oscillator device includes a switching element configured to be switched to an ON state at a threshold voltage or above and switched to an OFF state below a holding voltage; and a load element connected to the switching element in series. In the nano-oscillator device, vibration characteristics are implemented by using a switching element and a load element connected thereto in series. Also, the oscillation frequency of the output waveform of the oscillator may be adjusted in real time according to a gate voltage by using a field effect transistor serving as a load element. Using a synchronization characteristic in which the oscillation frequency and phase are locked with respect to an external input, it is possible to implement a computing system based on a network in which a plurality of oscillator devices are coupled.

A nano-oscillator device includes a switching element configured to be switched to an ON state at a threshold voltage or above and switched to an OFF state below a holding voltage; and a load element connected to the switching element in series. In the nano-oscillator device, vibration characteristics are implemented by using a switching element and a load element connected thereto in series. Also, the oscillation frequency of the output waveform of the oscillator may be adjusted in real time according to a gate voltage by using a field effect transistor serving as a load element. Using a synchronization characteristic in which the oscillation frequency and phase are locked with respect to an external input, it is possible to implement a computing system based on a network in which a plurality of oscillator devices are coupled.

Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a comparator stage, a resistor, a capacitor, and active switches arranged to provide a clock signal having a time period that is independent of a first source voltage. Independence may be achieved by using a second source voltage derived from the first source voltage as a fixed ratio.

Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a comparator stage, a resistor, a capacitor, and active switches arranged to provide a clock signal having a time period that is independent of a first source voltage. Independence may be achieved by using a second source voltage derived from the first source voltage as a fixed ratio.

Temperature compensated oscillators and associated methods are disclosed. The oscillator may include an inverter with a variable load configured to provide different conductance values based on an operating temperature of the oscillator. The variable load includes two or more branches in parallel, where each branch has a unique conductance value different from each other. Further, the variable load is coupled to a temperature sensor that generates signals based on determining the operating temperature. The signals of the temperature sensor can activate one or more branches of the variable load. As a result, the inverter may trigger at different voltage levels such that variations in the frequency of the clock signal that the oscillator generates can be reduced across different operating temperatures.

Temperature compensated oscillators and associated methods are disclosed. The oscillator may include an inverter with a variable load configured to provide different conductance values based on an operating temperature of the oscillator. The variable load includes two or more branches in parallel, where each branch has a unique conductance value different from each other. Further, the variable load is coupled to a temperature sensor that generates signals based on determining the operating temperature. The signals of the temperature sensor can activate one or more branches of the variable load. As a result, the inverter may trigger at different voltage levels such that variations in the frequency of the clock signal that the oscillator generates can be reduced across different operating temperatures.

Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances.

Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances.