An electronic circuit including: a differential multiplier circuit with a first differential input and a second differential input and a differential output; and a phase locked loop (PLL) circuit including: (1) a balanced differential mixer circuit with a first differential input electrically connected to the differential output of the differential multiplier circuit, a second differential input, and an output; (2) a loop filter having an output and an input electrically connected to the output of the balanced differential mixer circuit; and (3) a voltage controlled oscillator (VCO) circuit having an input electrically connected to the output of the loop filter and with an output electrically feeding back to the second differential input of the balanced differential mixer circuit.

In an embodiment, a circuit for tripling frequency is configured to receive an input voltage (V.sub.in) having a sinusoidal shape and a base frequency. The circuit has a first and a second transistor pair that are cross-coupled, and a trans-characteristics f(V.sub.in) approximating a polynomial nominal trans-characteristic given by

[00001]$f\left(V_{\mathrm{in}}\right)=\left(\frac{3}{A}.Math.V_{\mathrm{in}}-\frac{4}{A^3}.Math.V_{\mathrm{in}}^3\right).Math.g_m$

where A represents an amplitude of the input voltage and g.sub.m is a transconductance of transistors of the first and second transistor pairs.

Certain aspects of the present disclosure generally relate to techniques and apparatus for doubling the frequency of a signal. For example, certain aspects are directed to a phase frequency detector (PFD)-based rising-edge-delay-only frequency doubling circuit. One example frequency doubler circuit generally includes a first delay stage, a second delay stage, a first PFD, a first rising-edge-only adjustable delay cell, a second PFD, a second rising-edge-only adjustable delay cell a logic gate, and a comparator configured to compare a direct-current (DC) voltage value of an output of the logic gate with a reference voltage and control the first and second rising-edge-only adjustable delay cells based on the comparison.

Certain aspects of the present disclosure generally relate to techniques and apparatus for doubling the frequency of a signal. For example, certain aspects are directed to a phase frequency detector (PFD)-based rising-edge-delay-only frequency doubling circuit. One example frequency doubler circuit generally includes a first delay stage, a second delay stage, a first PFD, a first rising-edge-only adjustable delay cell, a second PFD, a second rising-edge-only adjustable delay cell a logic gate, and a comparator configured to compare a direct-current (DC) voltage value of an output of the logic gate with a reference voltage and control the first and second rising-edge-only adjustable delay cells based on the comparison.

A device is disclosed that includes a semiconductor substrate, a bottom electrode disposed on a first surface of the semiconductor substrate, an insulating layer disposed on a second surface that is opposite to the first surface, of the semiconductor substrate, a current-to-voltage converter, a first electrode and a second electrode that are separate from each other and disposed on the insulating layer. The first electrode is configured to be applied with an input signal, and the second electrode is configured to output an output current signal that is associated with the input signal, the input signal is configured to have a voltage level that is variable, and the output current signal is configured to have a peak current value and a valley current value. The current-to-voltage converter is configured to receive the output current signal to generate an output voltage signal.

A device is disclosed that includes a semiconductor substrate, a bottom electrode disposed on a first surface of the semiconductor substrate, an insulating layer disposed on a second surface that is opposite to the first surface, of the semiconductor substrate, a current-to-voltage converter, a first electrode and a second electrode that are separate from each other and disposed on the insulating layer. The first electrode is configured to be applied with an input signal, and the second electrode is configured to output an output current signal that is associated with the input signal, the input signal is configured to have a voltage level that is variable, and the output current signal is configured to have a peak current value and a valley current value. The current-to-voltage converter is configured to receive the output current signal to generate an output voltage signal.

A device is disclosed that includes a semiconductor substrate, a bottom electrode disposed on a first surface of the semiconductor substrate, an insulating layer disposed on a second surface that is opposite to the first surface, of the semiconductor substrate, a current-to-voltage converter, a first electrode and a second electrode that are separate from each other and disposed on the insulating layer. The first electrode is configured to be applied with an input signal, and the second electrode is configured to output an output current signal that is associated with the input signal, the input signal is configured to have a voltage level that is variable, and the output current signal is configured to have a peak current value and a valley current value. The current-to-voltage converter is configured to receive the output current signal to generate an output voltage signal.

A device is disclosed that includes a semiconductor substrate, a bottom electrode disposed on a first surface of the semiconductor substrate, an insulating layer disposed on a second surface that is opposite to the first surface, of the semiconductor substrate, a current-to-voltage converter, a first electrode and a second electrode that are separate from each other and disposed on the insulating layer. The first electrode is configured to be applied with an input signal, and the second electrode is configured to output an output current signal that is associated with the input signal, the input signal is configured to have a voltage level that is variable, and the output current signal is configured to have a peak current value and a valley current value. The current-to-voltage converter is configured to receive the output current signal to generate an output voltage signal.

Disclosed is a frequency multiplication apparatus including a first frequency multiplier receiving a first signal having a first frequency and outputting a second signal having a second frequency by multiplying the first frequency by n (n being a positive integer), a second frequency multiplier receiving the second signal and outputting a third signal having a third frequency by multiplying the second frequency by m (m being a positive integer), and a coupler connected between an output of the first frequency multiplier and an input of the second frequency multiplier and outputting a part of the second signal.

Disclosed is a frequency multiplication apparatus including a first frequency multiplier receiving a first signal having a first frequency and outputting a second signal having a second frequency by multiplying the first frequency by n (n being a positive integer), a second frequency multiplier receiving the second signal and outputting a third signal having a third frequency by multiplying the second frequency by m (m being a positive integer), and a coupler connected between an output of the first frequency multiplier and an input of the second frequency multiplier and outputting a part of the second signal.