A method for timing aperture synthesis arrays comprising the steps of: (a) coupling a plurality of independent crystal oscillators, each of the plurality of independent crystal oscillators having a unique output frequency; (b) digitally synchronizing the plurality of independent crystal oscillators in phase; (c) combining the unique output frequencies; and (d) obtaining a stable digital reference signal for timing at least one remote radio device of the aperture synthesis array.

A fractional-N frequency synthesizer comprising a multi-phase generator, a multi-path error phase generator; a current combiner; a loop filter connected to the current combiner; an oscillator (150) connected to the loop filter; a frequency divider (160); a SDM connected to both the frequency divider and the multi-phase generator, to generate variable division ratio.

A frequency synthesis system and a frequency generation method of microwave photons based on photoelectric synergy are provided, the system includes an optical frequency comb for generating narrow optical pulse signals with high stability and low phase noise through; an optical frequency doubling/dividing unit for performing frequency doubling or frequency dividing on a repetition frequency of the narrow optical pulse signals output by the optical frequency comb; a photoelectric conversion unit for performing photoelectric conversion on input optical pulse signals, and outputting an electrical frequency comb; a second electrical filter unit for filtering input electrical signals; and a second electrical amplifying unit for performing power amplification on the input electrical signals. An operation frequency and performance of the optical frequency comb is three orders of magnitude or higher than that of common microwave frequency sources, microwave frequency signals with larger frequency range and better performance can be generated.

A frequency synthesis system and a frequency generation method of microwave photons based on photoelectric synergy are provided, the system includes an optical frequency comb for generating narrow optical pulse signals with high stability and low phase noise through; an optical frequency doubling/dividing unit for performing frequency doubling or frequency dividing on a repetition frequency of the narrow optical pulse signals output by the optical frequency comb; a photoelectric conversion unit for performing photoelectric conversion on input optical pulse signals, and outputting an electrical frequency comb; a second electrical filter unit for filtering input electrical signals; and a second electrical amplifying unit for performing power amplification on the input electrical signals. An operation frequency and performance of the optical frequency comb is three orders of magnitude or higher than that of common microwave frequency sources, microwave frequency signals with larger frequency range and better performance can be generated.

A local oscillator device includes an oscillator module including a first inductive element and a capacitive element coupled in parallel with the inductive element. A frequency divider is coupled to the oscillator module for delivering a local oscillator signal. The local oscillator device includes an autotransformer including the first inductive element and two second inductive elements respectively coupled to the terminals of the first inductive element and to two output terminals of the autotransformer, the output terminals being further coupled to input terminals of the frequency divider.

A radio frequency signal synthesizer circuit includes a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal and a controlled oscillator to generate the clock signal. The controlled oscillator is configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.

A radio frequency signal synthesizer circuit includes a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal and a controlled oscillator to generate the clock signal. The controlled oscillator is configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.

A digital phase locked loop (DPLL) circuit includes a digital-to-time converter (DTC) configured to generate a delayed reference clock signal by delaying a reference clock signal according to a delay control signal and a time-to-digital converter (TDC) coupled to an output of the DTC. The TDC is configured to sample a value of a transition signal according to the delayed reference clock signal and to generate an output signal indicating a phase difference between the delayed clock signal and an input clock signal. A method of controlling a DPLL includes delaying a reference clock signal according to a delay control signal, sampling a value of a transition signal according to the delayed reference clock signal, generating an output signal indicating a phase difference between the delayed clock signal and an input clock signal, and generating a digitally controlled oscillator (DCO) clock signal according to the output signal.

A digital phase locked loop (DPLL) circuit includes a digital-to-time converter (DTC) configured to generate a delayed reference clock signal by delaying a reference clock signal according to a delay control signal and a time-to-digital converter (TDC) coupled to an output of the DTC. The TDC is configured to sample a value of a transition signal according to the delayed reference clock signal and to generate an output signal indicating a phase difference between the delayed clock signal and an input clock signal. A method of controlling a DPLL includes delaying a reference clock signal according to a delay control signal, sampling a value of a transition signal according to the delayed reference clock signal, generating an output signal indicating a phase difference between the delayed clock signal and an input clock signal, and generating a digitally controlled oscillator (DCO) clock signal according to the output signal.

A high-frequency oscillator comprises a reference-frequency generator and a high-frequency generator. The reference-frequency generator generates a variable reference frequency and supplies it to the high-frequency generator. The high-frequency generator comprises a phase-locked loop and generates a high-frequency signal from the variable reference frequency. The phase-locked loop comprises at least one first mixer, a second mixer and several switches. The first mixer, the second mixer and the switches are connected in series. The mixers are connected into the phase-locked loop individually in a selective manner by means of the switches.