An oscillator circuit arrangement comprises an inverter having input and output terminals that are to be connected to a crystal device. An automatic gain control device controls a current source that supplies current to the inverter. First and second diode devices having different orientation are connected between the input and the output of the inverter. The oscillator consumes low power and has a fast recovery time after an electromagnetic interference event. The oscillator can be used in electronic labels.

A clock signal is generated with an oscillator. A crystal oscillator core within the oscillator circuit is switched on to produce first and second oscillation signals that are approximately opposite in phase. When a difference between a voltage of the first oscillation signal and a voltage of the second oscillation signal exceeds an upper threshold range, the crystal oscillator core is switched off. When the difference between the voltage of the first oscillation signal and the voltage of the second oscillation signal falls below the upper threshold range, the crystal oscillator core is switched back on. This operation is repeated so as to produce the clock signal.

An ultra-low power (ULP) oscillator that down-converts the current of a resonator to DC, then amplifies it when its still in DC, followed by up-converting the amplified signal back to the oscillation frequency. The disclosed oscillator eliminates the minimum transconductance (gm) requirement of a Pierce oscillator, by processing the signal at DC. In addition, the circuit only requires the DC amplifier's feedback resistor to be greater than the resistive loss of the resonator, i.e., Rf>Rm.

An amplitude regulator circuit portion is arranged to supply a current to an inverter in an oscillator circuit. The regulator monitors a voltage at the input terminal of the inverter and varies the current supplied to the inverter in response to the monitored voltage. The amplitude regulator comprises first, second, and third PMOS transistors, and first and second NMOS transistors and is arranged such that an input node is connected to the input terminal of the inverter, a respective gate terminal of each of the first and second NMOS transistors, and a respective drain terminal of the first NMOS and first PMOS transistors. The amplitude regulator also comprises a back-bias circuit portions arranged to vary a back-bias voltage at a back-gate terminal of the second NMOS transistor, to vary a threshold voltage, where the threshold voltage of the second NMOS transistor is lower than that of the first NMOS transistor.

A method and apparatus for speeding up the start-up process of a crystal oscillator. The energy required for starting oscillations is inserted to the crystal by a stimulus in the form of a time-variant voltage or current pattern, either periodic or aperiodic. The stimulus is stopped after a pre-established period, then the oscillator continues to operate in its normal mode and completes the start-up process significantly faster, compared to a start-up process not comprising the above stimulus.

Examples are disclosed that relate to oscillator circuits. One example provides a circuit comprising an amplifier, a resonator in parallel with the amplifier, and a shunt path including one or more circuit elements, the shunt path coupled to a first node downstream of an output of the amplifier and to a second node, the shunt path configured to shunt current received at the first node away from an input of the resonator and toward the second node, the second node having, at steady state, a relatively lower voltage than an input voltage of the resonator.

Low voltage crystal oscillator having native NMOS transistors used for coupling/decoupling to/from GPIO. The native NMOS transistors function properly at a low supply voltage when on (low resistance) and a high supply voltage when off (high resistance). Oscillator Gm driver bias resistors are repurposed to degenerate the native NMOS transistors when they are off, thereby reducing the leakage current thereof (oscillator circuit decoupled from GPIO nodes). This ensures compliance with the CMOS IIH leakage current specification during an external clock (EC) mode at a high supply voltage.

A voltage controlled oscillator includes a resonator and an amplifier. The resonator includes a capacitive element and an inductive element. The inductive element has a plurality of conductive segments forming a physical loop. The inductive element has electrical connections on the physical loop to the plurality of conductive segments forming at least one electrical loop disposed within an interior space formed by the physical loop. The amplifier has an input and an output, the input coupled to a first conductive segment forming a first impedance and the output coupled to a second conductive segment forming a second impedance.

Examples are disclosed that relate to oscillator circuits. One example provides a circuit comprising an amplifier, a resonator in parallel with the amplifier, and a shunt path including one or more circuit elements, the shunt path coupled to a first node downstream of an output of the amplifier and to a second node, the shunt path configured to shunt current received at the first node away from an input of the resonator and toward the second node, the second node having, at steady state, a relatively lower voltage than an input voltage of the resonator.

Various technologies described herein pertain to non-inverting multi-mode oscillators. An oscillator circuit can include a non-inverting sustaining amplifier and a feedback network. The non-inverting sustaining amplifier includes an amplifier input and an amplifier output. The feedback network includes a crystal, an input portion, and an output portion. The crystal of the feedback network can be connected between the amplifier input and the amplifier output of the non-inverting sustaining amplifier. The input portion of the feedback network can be connected between the amplifier input and ground, and can include an inductor realized using a tank circuit. Further, the output portion of the feedback network can be connected between the amplifier output and ground, and can include a capacitor. Moreover, the crystal can operate in series resonance mode or parallel resonance mode.