A voltage controlled oscillator includes a resonator and an amplifier. The resonator includes a capacitive element and an inductive element. The inductive element has a plurality of conductive segments forming a physical loop. The inductive element has electrical connections on the physical loop to the plurality of conductive segments forming at least one electrical loop disposed within an interior space formed by the physical loop. The amplifier has an input and an output, the input coupled to a first conductive segment forming a first impedance and the output coupled to a second conductive segment forming a second impedance.

An oscillator circuit includes a phase-locked loop, a crystal resonator, first and second capacitors, and first and second impedance elements. The phase-locked loop is coupled between a first node and a second node. The crystal resonator is also coupled between the first node and the second node. The first capacitor is coupled between the first node and ground, and the second capacitor is coupled between the second node and ground. The first impedance element is coupled in a first circuit path from the first node to ground through the first capacitor. The second impedance element is coupled in a second circuit path from the second node to ground through the second capacitor.

An amplitude regulator circuit portion is arranged to supply a current to an inverter in an oscillator circuit. The regulator monitors a voltage at the input terminal of the inverter and varies the current supplied to the inverter in response to the monitored voltage. The amplitude regulator comprises first, second, and third PMOS transistors, and first and second NMOS transistors and is arranged such that an input node is connected to the input terminal of the inverter, a respective gate terminal of each of the first and second NMOS transistors, and a respective drain terminal of the first NMOS and first PMOS transistors. The amplitude regulator also comprises a back-bias circuit portions arranged to vary a back-bias voltage at a back-gate terminal of the second NMOS transistor, to vary a threshold voltage, where the threshold voltage of the second NMOS transistor is lower than that of the first NMOS transistor.

In examples, an electronic device comprises an oscillator circuit configured to provide an output signal and a controller coupled to the oscillator circuit. The controller is configured to receive first and second target rates; dynamically adjust a frequency accuracy of the output signal based on the first target rate; and dynamically adjust an amplitude of the output signal based on the second target rate.

In one form, an oscillator includes an oscillator core circuit and a dynamic gain control circuit. The oscillator core circuit is for connection to a frequency reference element and provides a first clock signal using a negative gain element having a gain determined by a gain control signal. The dynamic gain control circuit is coupled to the oscillator core circuit for calibrating the gain control signal to a startup value based on oscillations reaching a first threshold during a startup state, and calibrating the gain control signal to a steady-state value based on oscillations falling to a second threshold after an end of the startup state and before entering a steady state. The first threshold is higher than the second threshold. The dynamic gain control circuit operates the oscillator core circuit during the steady state using the steady-state value.

Methods and systems are provided for generating balanced oscillations in oscillators. An oscillator comprises a resonator input configured to receive, from an electro-mechanical resonator, a resonator signal; and an oscillator core comprising a first and a second complementary inverters forming a first loop and a second loop with the resonator input, respectively. The inverters are programmable to contribute to the resonator signal a first gain or a second gain to generate balanced oscillations in the oscillator, with the first gain being less than an upper threshold gain required to generate parasitic-mode oscillations when starting balanced oscillations, and the second gain being equal to or greater than a lower threshold, gain required to generate resonator-mode oscillations. Each inverter is configured to regulate gain contributed by the inventor based on regulating amount of power received to control the gain.

In one form, an oscillator includes an oscillator core circuit and a dynamic gain control circuit. The oscillator core circuit is for connection to a frequency reference element and provides a first clock signal using a negative gain element having a gain determined by a gain control signal. The dynamic gain control circuit provides the gain control signal to set an absolute value of the gain to a first level during a startup state, and changes the gain control signal to reduce the absolute value of the gain to a second level lower than the first level after the first clock signal has reached a steady state.

An integrated circuit device includes a substrate, a joining part provided on the substrate and joined to a vibrator, and a plurality of bonding pads provided on the substrate. The joining part includes an insulating protective film that covers a part of a surface of the substrate, and no insulating protective film is provided between the adjacent bonding pads.

A low voltage crystal oscillator (XTAL) driver with feedback controlled duty cycling for ultra low power biases an amplifier for an XTAL in the sub-threshold operating regime. A feedback control scheme can be used to bias the amplifier for an XTAL biased in the sub-threshold operating regime. The amplifier of a XTAL oscillator can be duty cycled to save power, e.g., the XTAL driver can be turned off to save power when the amplitude of the XTAL oscillation reaches a maximum value in range; but be turned back on when the amplitude of the XTAL oscillation starts to decay, to maintain the oscillation before it stops. In addition or alternatively, a feedback control scheme to duty cycle the amplifier of a XTAL oscillator can be used to monitor the amplitude of the oscillation.

In one form, an oscillator includes an oscillator core circuit and a dynamic gain control circuit. The oscillator core circuit is for connection to a frequency reference element and provides a first clock signal using a negative gain element having a gain determined by a gain control signal. The dynamic gain control circuit provides the gain control signal to set an absolute value of the gain to a first level during a startup state, and changes the gain control signal to reduce the absolute value of the gain to a second level lower than the first level after the first clock signal has reached a steady state.