An oscillator acceleration circuit, configured to accelerate the start-up of an oscillator, wherein the oscillator has an input terminal and an output terminal. The oscillator acceleration circuit includes an inverting amplifier, a feedback resistor and an acceleration circuit; the inverting amplifier has an input terminal and an output terminal correspondingly coupled to the input terminal and the output terminal of the oscillator. The feedback resistor is coupled between the input terminal and the output terminal of the oscillator, and the acceleration circuit is coupled between the input terminal and the output terminal of the oscillator. The acceleration circuit is configured to provide a transfer function, wherein the transfer function is the same as the transfer function provided by a resistor and a capacitor connected in parallel; wherein the resistance of the resistor is less than zero.

A current generating circuit includes a current generator configured to supply a reference current, switches connected to the current generator, wherein one switch of the switches is selected and configured to operate, according to a switch selection signal, and one or more resistors, respectively connected to the switches, wherein a rate of current change according to a temperature change of the current generator is adjusted based on a temperature coefficient of resistance (TCR) of resistors connected to the one switch, according to adjustment of the one switch.

A resistor-capacitor (RC) oscillator with shared circuit architecture includes a current mirror circuit, a comparator circuit, a bias voltage generator, and a clock buffer. The current mirror circuit utilizes a plurality of transistors to perform current control, to adjust a second current on a second current path according to a first current on a first current path. The comparator circuit includes a first transistor, a second transistor, a resistor, and a capacitor, wherein a comparison result signal generated by the comparator circuit corresponds to a voltage of the capacitor. The bias voltage generator generates a bias voltage as a comparator reference voltage between the first transistor and the resistor. The clock buffer buffers the comparison result signal to generate an output signal. The bias voltage generator at least shares the resistor with the comparator circuit, and the RC oscillator may achieve targets of low cost and high performance.

Oscillator circuits, electronic devices, and methods are disclosed. In one embodiment, an oscillator circuit includes a plurality of oscillator transistors comprising a plurality of gates, a plurality of adjustment transistors coupled to the plurality of gates, a differential output coupled to the plurality of oscillator transistors, a plurality of current transistors configured to receive one or more mixed bias current outputs, and generate a main current based on the one or more mixed bias current outputs, the one or more mixed bias current outputs and the main current being substantially constant over a range of temperatures, and one or more switches configured to set an oscillation frequency of the differential output by driving a first portion of a main current through at least one of the plurality of oscillator transistors, and driving a second portion of the main current through at least one of the plurality of adjustment transistors.

Both parallel-type and serial-type dual-mode oscillators employing stress compensated cut resonators having various configurations are disclosed. Both classes of dual-mode oscillators employ multiple tank circuits to pass one frequency of the resonator and block the other frequency. The tank circuits isolate the operation of the two oscillator sub-circuits that form the dual-mode oscillator from one another. The dual-mode oscillators may be implemented with either bipolar or CMOS transistors. The parallel-type dual-mode oscillators employ inverters to provide gain. The serial-type dual-mode oscillators employ a two (or three) stage design including a follower circuit first stage and an inverting amplifier/limiter circuit second stage, with an optional intervening transimpedance amplifier stage.

A tunable oscillator includes a current bias circuit configured to generate a reference bias current, a variable voltage bias circuit configured to receive the reference bias current and generate a bias voltage varied based on a voltage control signal, an oscillation signal generator circuit configured to generate an oscillation signal based on the reference bias current and a switching control signal, and a switching control circuit configured to generate the switching control signal based on the bias voltage and the oscillation signal. A frequency of the oscillation signal is varied based on a magnitude of the bias voltage.

A starting circuit capable of further reducing an influence of a variation in the threshold voltage of a transistor is proposed. The starting circuit includes an N-type first MOS transistor whose threshold voltage is near 0 V, a resistor interposed between a source terminal of the first MOS transistor and a ground, and a control circuit controlling a gate voltage of the first MOS transistor. An amount of first current transmitted to a device to be driven and starting the device is controlled according to the control of the gate voltage.

An oscillating circuit comprises a constant voltage supply circuit, a constant current supply circuit and an oscillating circuit; the constant voltage supply circuit is configured to output constant voltage; the constant current supply circuit is configured to output constant current; and the oscillating circuit is connected to the constant voltage supply circuit and the constant current supply circuit, and is configured to generate an oscillating signal with a preset frequency according to the constant voltage and the constant current.

A clock signal is generated with an oscillator. A crystal oscillator core within the oscillator circuit is switched on to produce first and second oscillation signals that are approximately opposite in phase. When a difference between a voltage of the first oscillation signal and a voltage of the second oscillation signal exceeds an upper threshold range, the crystal oscillator core is switched off. When the difference between the voltage of the first oscillation signal and the voltage of the second oscillation signal falls below the upper threshold range, the crystal oscillator core is switched back on. This operation is repeated so as to produce the clock signal.

A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.