A voltage controlled oscillator includes a resonance unit, coupling unit and source degeneration unit. The resonance unit includes two first inductors and two first variable capacitors. The first inductor is electrically connected to the first variable capacitor. The coupling unit includes a first transistor and a second transistor. Power supply input terminals of the first and second transistors are electrically connected to the resonance unit. The source degeneration unit includes two adjustable inductors, two fourth inductors and two second variable capacitors. The adjustable inductors are connected to power supply output terminals of the first and second transistors, respectively. The second variable capacitor is electrically connected to the adjustable inductor and the fourth inductor, wherein equivalent inductance of the adjustable inductor is adjusted, such that input impedance looking in the direction away from the resonance unit from the power supply input terminal is featured by negative capacitance.

The disclosure relates to a circuit including a current mirror circuit with a current path including a first transistor and a replica current path including a second transistor. The current path is connected to the replica current path to influence a current in the replica current path based on a reference current in the current path. The current in the replica current path may be proportional to the reference current. The circuit further includes a capacitor coupled between a gate of the second transistor and a first potential, a switch coupled between a gate of the first transistor and the gate of the second transistor to selectively disconnect the gate of the first transistor from the gate of the second transistor and from a first electrode of the capacitor. The disclosure further relates to a method for operating a circuit including a current mirror circuit.

Disclosed are a frequency multiplier, a signal transmitter and a radar chip. The frequency multiplier includes a signal generator that is configured to receive an FMCW signal and output a square wave signal at a frequency same as a frequency of the FMCW signal; and a third harmonic amplifier that is coupled to the signal generator and is configured to amplify a third harmonic wave in the square wave signal and output a frequency-tripled FMCW signal. The above-mentioned solution can improve the generation efficiency of the frequency-tripled signal.

A voltage controlled oscillator (VCO), a method of designing a voltage controlled oscillator, and a design structure comprising a semiconductor substrate including a voltage controlled oscillator are disclosed. In one embodiment, the VCO comprises an LC tank circuit for generating an oscillator output at an oscillator frequency, and an oscillator core including cross-coupled semiconductor devices to provide feedback to the tank circuit. The VCO further comprises a supply node, a tail node, and a noise by-pass circuit connected to the supply and tail nodes, in parallel with the tank circuit and the oscillator core. The by-pass circuit forms a low-impedance path at a frequency approximately twice the oscillator frequency to at least partially immunize the oscillator core from external noise and to reduce noise contribution from the cross-coupled semiconductor devices.

A voltage-controlled oscillator (VCO) having an LC tank circuit with a variable inductance is disclosed. In one embodiment, the VCO includes a capacitance, at least a portion of which is variable and responsive to a first tuning voltage. The VCO further includes a transformer having first (primary) and second (secondary) windings. The primary winding is coupled to the capacitance, and provides the inductance of the LC tank circuit. The secondary winding is coupled to a current control circuit. The current control circuit may vary the induced current through the secondary winding. By varying the induced current through the secondary winding, the effective inductance of the primary winding may also be varied. Accordingly, the VCO may be tuned by varying the inductance of the LC tank circuit, as well as by varying the capacitance of the same.

An oscillator circuit includes an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor, a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable, and a second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable. The first bias current and the second bias current are used to tune a frequency range of the oscillator.

A voltage controlled oscillator (VCO), a method of designing a voltage controlled oscillator, and a design structure comprising a semiconductor substrate including a voltage controlled oscillator are disclosed. In one embodiment, the VCO comprises an LC tank circuit for generating an oscillator output at an oscillator frequency, and an oscillator core including cross-coupled semiconductor devices to provide feedback to the tank circuit. The VCO further comprises a supply node, a tail node, and a noise by-pass circuit connected to the supply and tail nodes, in parallel with the tank circuit and the oscillator core. The by-pass circuit forms a low-impedance path at a frequency approximately twice the oscillator frequency to at least partially immunize the oscillator core from external noise and to reduce noise contribution from the cross-coupled semiconductor devices.

An oscillator module used with a plurality of power sources includes an oscillator unit, a clock monitor unit (CMU), a software module and a digital calibration circuit. The oscillator unit generates a clock signal. The CMU is coupled to the oscillator unit, determines whether an amplitude of the clock signal exceeds a predetermined threshold, and outputs an alarm signal if the amplitude of the clock signal is lower than the predetermined threshold. The software module is coupled to the CMU, and receives the alarm signal to output a calibration signal. The digital calibration circuit is coupled to the oscillator and the software module, and outputs a control signal in response to the clock signal and the calibration signal, adjusting the plurality of power sources to modify the clock signal.

A voltage controlled oscillator includes a resonance unit, coupling unit and source degeneration unit. The resonance unit includes two first inductors and two first variable capacitors. The first inductor is electrically connected to the first variable capacitor. The coupling unit includes a first transistor and a second transistor. Power supply input terminals of the first and second transistors are electrically connected to the resonance unit. The source degeneration unit includes two adjustable inductors, two fourth inductors and two second variable capacitors. The adjustable inductors are connected to power supply output terminals of the first and second transistors, respectively. The second variable capacitor is electrically connected to the adjustable inductor and the fourth inductor, wherein equivalent inductance of the adjustable inductor is adjusted, such that input impedance looking in the direction away from the resonance unit from the power supply input terminal is featured by negative capacitance.

A key based technique that targets obfuscation of critical circuit parameters of an analog circuit block by masking physical characteristics of a transistor (width and length) and the circuit parameters reliant upon these physical characteristics (i.e. circuit biasing conditions, phase noise profile, bandwidth, gain, noise figure, operating frequency, etc.). The proposed key based obfuscation technique targets the physical dimensions of the transistors used to set the optimal biasing conditions. The widths and/or lengths of a transistor are obfuscated and, based on an applied key sequence, provides a range of potential biasing points. Only when the correct key sequence is applied and certain transistor(s) are active, are the correct biasing conditions at the target node set.