A method for activating a drive unit of a deflection unit of a two-dimensional microscanner device. First and second control signals for activating the drive unit of the deflection unit are initially generated using a processing unit. The first and second control signals are subsequently transferred to the drive unit. A sinusoidal first movement of the deflection unit about a first axis and a sinusoidal second movement of the deflection unit about a second axis are carried out at a first point in time based on the transferred control signals. The first control signals are then adapted so that a periodic third movement is superimposed on the first movement at a second point in time following the first point in time. Alternatively, the second control signals are adapted so that a periodic fourth movement is superimposed on the second movement at the second point in time following the first.

An oscillator circuit includes a first BAW oscillator, a first coupling stage, a second BAW oscillator, and a second coupling stage. The first BAW oscillator is configured to generate a first output signal at a frequency. The first coupling stage is coupled to the first BAW oscillator, and is configured to amplify the first output signal. The second BAW oscillator is coupled to the first coupling stage, and is configured to generate a second output signal at the frequency. The second output signal differs in phase from the first output signal. The second coupling stage is coupled to the first BAW oscillator and the second BAW oscillator, and is configured to amplify the second output signal and drive the first BAW oscillator.

An injection locked frequency divider is disclosed. The injection-locked frequency divider includes a sub-harmonic injection-locked oscillator, a reference clock divider, a counter, and a variable load resistor control unit. The sub-harmonic injection-locked oscillator has variable load resistors that are adjusted in response to a resistance adjustment signal, and, when oscillation frequency determined based on the magnitudes of the variable load resistors is a sub-harmonic of an injection signal, outputs signals having the oscillation frequency as divided output signals. The reference clock divider generates a count-enable signal from a reference clock signal according to a reference division ratio. The counter generates divided output count signals based on the divided output signals in response to the count-enable signal. The variable load resistor control unit compares target count values, determined based on the target frequencies of the divided output signals, with the divided output count signals, and outputs the resistance adjustment signal.