A low voltage inverter-based amplifier includes a first inverter-based amplification module, a second inverter-based amplification module, an inverter-based feedforward module, and an inverter-based common mode detector. The first inverter-based amplification module receives an input signal. The second inverter-based amplification module receives the input signal through the inverter-based feedforward module, and receives a first output signal from the first inverter-based amplification module. The inverter-based common mode detector receives an amplified signal from the second inverter-based amplification module, and outputs a feedback signal to the second inverter-based amplification module. Since the first and the second inverter-based amplification modules are both inverter-based, the supply voltage of the low voltage inverter-based amplifier is provided to supply one PMOS and one NMOS for normal operation. Therefore, a number of cascade MOSs of the low voltage inverter-based amplifier is two, and the low voltage inverter-based amplifier can be normally operated under the low supply voltage.

Embodiments can provide individualized controlling of noise injection during startup of a crystal oscillator. In some embodiments, a simple learning block can be placed in parallel to a crystal oscillator circuit to control noise injection during the startup of the crystal oscillator. The learning block can be configured to control the noise injection during the startup of the crystal oscillator by determining whether the crystal oscillator has been stabilized. In some implementations, an adjustment block may be employed to adjust the count determined by the learning block based on one or more characteristics of the crystal oscillator during a startup of the crystal oscillator. In some embodiments, a simple block that creates a negative capacitance can be configured in parallel to the crystal oscillator.

A dual-mode oscillator and a multi-phase oscillator includes a mode switching circuit to switch between two operating modes and obtain oscillation signals having two different bands. The dual-mode oscillator also includes two transformer-coupled oscillators with each having a step-up transformer. The step-up transformer multiplies a drain voltage swing of a first metal oxide semiconductor (MOS) transistor and then injects a voltage signal to a gate of a second MOS transistor to obtain a larger gate voltage swing without increasing a supply voltage of the oscillator. The dual-mode oscillators are coupled through multi-phase coupled circuits to form a Mobius loop.

A local oscillator generator (LO generator) may be configured to transmit an LO signal to a mixer. The LO generator may include an input buffer configured to generate a first internal oscillator signal based on the input oscillator signal. The LO generator may include a frequency dividing circuit configured to generate a second internal oscillator signal based on dividing a frequency of the first internal oscillator signal. The LO generator may include an output buffer configured to generate the LO signal based on the second internal oscillator signal. The input buffer and the frequency dividing circuit may each be configured to receive a power voltage independently of the output buffer.

A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop. The calibration engine circuit is coupled to the delta-sigma modulation circuit, the voltage controlled oscillator, the injection locked oscillator, the power amplifier circuit, the first power detection circuit, the second power detection circuit, and the third power detection circuit for adjusting frequency gains of the voltage controlled oscillator, the injection locked oscillator, and the power amplifier circuit to approach wideband flatness frequency responses.

Injection-locked oscillator comprising: a control input receiving a control signal, the value of the natural frequency of the oscillator being a function of the amplitude of the control signal; a synchronisation input receiving a periodic synchronisation signal, the oscillator outputting an output signal with a frequency equal to the frequency of the synchronisation signal, and such that a phase shift between the output signal and the synchronisation signal depends on a difference between the natural frequency of the oscillator and the frequency of the synchronisation signal; a first load impedance onto which a load signal is applied; a second load impedance; a first coupling component periodically coupling the second load impedance to the first load impedance, at the synchronisation frequency.

Embodiments of clock circuits disclosed herein include a crystal oscillator circuit, an injection oscillator coupled to kick-start the crystal oscillator circuit and a digital frequency calibration circuit coupled to recalibrate the injection oscillator. The crystal oscillator circuit is configured to generate a clock signal at a resonant frequency. The injection oscillator is coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit. The digital frequency calibration circuit is coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit. Methods are provided herein to recalibrate the injection frequency of an injection oscillator over time, temperature and/or supply voltage.

The disclosure provides an apparatus including: a pair of signal injection transistors each having a gate terminal coupled to a differential reference signal, and a pair of cross-coupled amplifier transistors configured to amplify a voltage of the differential reference signal to yield a voltage-amplified reference signal at a local oscillator (LO) port of a mixer; an electronic oscillator having an oscillation output node coupled to the LO port of the mixer in parallel with the injection-locked buffer, and configured to generate an oscillator output for transmission to the output node based on a back gate bias voltage applied to the electronic oscillator; and an access transistor having a gate coupled to a switching node, and a back gate terminal coupled to the back gate bias voltage, wherein the access transistor is configured to enable or disable current flow through the electronic oscillator in parallel with the injection-locked buffer.

Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.

Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.