Oscillator calibration circuits and wireless transmitters including oscillator calibration circuits. An oscillator calibration circuit includes a first frequency locking circuit (FLC) coupled to a first oscillator, wherein the first FLC calibrates the frequency of the first oscillator using an over-the-air reference signal, wherein the first FLC calibrates the first oscillator prior to a data transmission session and remains free running during the data transmission session.

A dual-mode oscillator and a multi-phase oscillator includes a mode switching circuit to switch between two operating modes and obtain oscillation signals having two different bands. The dual-mode oscillator also includes two transformer-coupled oscillators and a step-up transformer in the transformer-coupled oscillators where the step-up transformer multiplies a drain voltage swing of a first MOS transistor and then injects a voltage signal to a gate of a second MOS transistor to obtain a larger gate voltage swing without increasing a supply voltage of the oscillator. The dual-mode oscillators are connected through multi-phase coupled circuits to form a Mobius loop.

A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.

A frequency divider includes a signal injection circuit and an oscillating circuit. The signal injection circuit includes a transistor of which a gate receives an input signal with an input frequency, a drain and a source cooperatively provide a first differential signal pair, and a body receives a biasing voltage. The two circuits cooperate to form a tank circuit having a free-running frequency and defining a frequency locking range which is around N times the free-running frequency and within which the input frequency falls. The tank circuit generates a second differential signal pair that is related to the first differential signal pair and that has an oscillating frequency which is one-N.sup.th the input frequency.

A frequency divider includes a signal injection circuit and an oscillating circuit. The signal injection circuit includes a transistor of which a gate receives an input signal with an input frequency, a drain and a source cooperatively provide a first differential signal pair, and a body receives a biasing voltage. The two circuits cooperate to form a tank circuit having a free-running frequency and defining a frequency locking range which is around N times the free-running frequency and within which the input frequency falls. The tank circuit generates a second differential signal pair that is related to the first differential signal pair and that has an oscillating frequency which is one-N.sup.th the input frequency.

In an exemplary structure, a transformer has a primary side and a secondary side. Output from the primary side is coupled to the secondary side. A first power supply is connected to a center tap of the primary side of the transformer. An oscillator includes a first transistor and a second transistor. The front-gate of the first transistor is connected to the drain of the second transistor and the primary side of the transformer. The front-gate of the second transistor is connected to the drain of the first transistor and the primary side of the transformer. A third transistor is connected to the first transistor and a fourth transistor is connected to the second transistor. The third and fourth transistors inject a desired frequency to the oscillator. A voltage source is connected to the back-gate of the first transistor and the back-gate of the second transistor.

Radio frequency (RF) amplifiers, such as power amplifiers, are provided herein. In certain configurations, an RF amplifier includes an input terminal that receives an RF input signal, an output terminal that provides an RF output signal, an injection-locked oscillator driver stage that amplifies the RF input signal to generate an injection-locked RF signal, and a stacked output stage that further amplifies the injection-locked RF signal to generate the RF output signal. The stacked output stage includes a stack of at least a first transistor and a second transistor in series with one another. Thus, the stacked output stage is operable over a wide range of supply voltage to overcome the relatively low breakdown voltages of scaled transistors. Moreover, the injection-locked oscillator driver stage provides the RF amplifier with excellent power efficiency, including in applications in which the stacked output stage operates with a supply voltage that is variable.

A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop. The calibration engine circuit is coupled to the delta-sigma modulation circuit, the voltage controlled oscillator, the injection locked oscillator, the power amplifier circuit, the first power detection circuit, the second power detection circuit, and the third power detection circuit for adjusting frequency gains of the voltage controlled oscillator, the injection locked oscillator, and the power amplifier circuit to approach wideband flatness frequency responses.

An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.