To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).

A clock integrated circuit is provided. The clock integrated circuit includes: a first clock generator which includes a crystal oscillator configured to generate a first clock signal; and a second clock generator which includes a resistance-capacitance (RC) oscillator and a first frequency divider, and is configured to: generate a second clock signal using the first frequency divider based on a clock signal output from the RC oscillator; perform a first calibration operation for adjusting a frequency division ratio of the first frequency divider to a first frequency division ratio based on the first clock signal; and perform a second calibration operation for adjusting the first frequency division ratio to a second frequency division ratio based on a sensed temperature.

To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).

An apparatus is disclosed for implementing multi-mode oscillation circuitry with stepping control. In an example aspect, the multi-mode oscillation circuitry comprises a resonator coupled to a first oscillator and a second oscillator. The multi-mode oscillation circuitry is configured to selectively be in a first configuration with the first oscillator in an active state and the second oscillator in an inactive state or a second configuration with the first oscillator in the inactive state and the second oscillator in the active state. The apparatus also includes a step-control circuit coupled to the multi-mode oscillation circuitry. The step-control circuit is configured to cause the first oscillator to switch from the inactive state to the active state and incrementally increase a first gain of the first oscillator based on the first oscillator being in the active state to enable the multi-mode oscillation circuitry to transition from the second configuration to the first configuration.

A method for startup of a crystal oscillator (XO) with aid of external clock injection, associated XO and a monitoring circuit therein are provided. The XO includes an XO core circuit, an external oscillator, and an injection switch, where a quality factor of the external oscillator is lower than a quality factor of the XO core circuit. The method includes: utilizing the external oscillator to generate an injected signal; turning on the injection switch to make energy of the injected signal be injected into the XO core circuit, where an amplitude modulation (AM) signal is generated according to combination of the injected signal and an intrinsic oscillation signal from the XO core circuit; and controlling the external oscillator to selectively change an injection frequency of the injected signal according to the AM signal. More particularly, the injection switch is not turned off until the startup process is completed.

An oscillator circuit comprises a crystal oscillator arranged to generate an oscillation signal, a bias current generator arranged to supply a bias current to the crystal oscillator, and a feedback stage arranged to generate a feedback signal in response to an amplitude of the oscillation signal reaching an amplitude threshold. The bias current generator is arranged to: in response to a supply of power to the oscillator circuit being switched on, generate the bias current at an increasing level commencing from a first level; in response to the feedback signal, terminate the increasing; and during subsequent oscillation of the crystal oscillator, supply the bias current at a second level dependent on a final level of the bias current reached when the increasing is terminated.

Methods, systems, and circuitries are provided to generate clock signals of different qualities in a device. A method includes determining whether the device is operating in a mid power mode or a high power mode. In response to determining that the device is operating in the mid power mode, oscillator circuitry is controlled to cause the oscillator circuitry to consume a lower amount of power, such that the oscillator circuitry generates a lower quality clock signal. In response to determining that the device is operating in the high power mode, the oscillator circuitry is controlled to cause the oscillator circuitry to consume a higher amount of power, such that the oscillator circuitry generates a higher quality clock signal. The lower amount of power and the higher amount of power are different from one another.

A crystal oscillator circuit comprises: a crystal oscillator; and an injection frequency generating circuit, the injection frequency generating circuit being configured to sense a signal of the crystal oscillator and amplify the sensed signal, the injection frequency generating circuit being further configured to inject the amplified signal to the crystal oscillator; wherein the crystal oscillator circuit is configured such that the crystal oscillator receives the amplified signal during an initial start-up period of the crystal oscillator and stops receiving the amplified signal at an end of the initial start-up period.

A method for startup of a crystal oscillator (XO) with aid of external clock injection, associated XO and a monitoring circuit therein are provided. The XO includes an XO core circuit, an external oscillator, and an injection switch, where a quality factor of the external oscillator is lower than a quality factor of the XO core circuit. The method includes: utilizing the external oscillator to generate an injected signal; turning on the injection switch to make energy of the injected signal be injected into the XO core circuit, where an amplitude modulation (AM) signal is generated according to combination of the injected signal and an intrinsic oscillation signal from the XO core circuit; and controlling the external oscillator to selectively change an injection frequency of the injected signal according to the AM signal. More particularly, the injection switch is not turned off until the startup process is completed.

A semiconductor device includes a resistor element connected to one and another end of a crystal oscillator, and an adjustable current type inverter element having an input connected to one end of the resistor element and an output connected to another end of the resistor element. A first capacitor element is connected to the input of the inverter element and to ground, and a second capacitor element has one end connected to ground. A first switching element switches a connection state of the one end of the first capacitor element and another end of the second capacitor element. A third capacitor element is connected to the output of the inverter element and to ground, and a fourth capacitor element has one end connected to ground. A second switching element switches a connection state of the one end of the third capacitor element and another end of the fourth capacitor element.