Systems and methods for compensating a non-linearity of a digitally controlled oscillator (DCO) are presented. Data comprising a plurality of silicon measurements is received. Each silicon measurement in the plurality of silicon measurements is compared to an ideal value. Based on the comparing, a plurality of compensation vectors is generated. Each compensation vector comprises at least one silicon measurement. At least one frequency is adjusted based on a compensation vector in the plurality of compensation vectors. A digitally-controlled oscillator frequency is generated based on the adjusted at least one frequency.

A signal generator and an associated resonator circuit are provided. The signal generator includes the resonator circuit and a core circuit. The resonator circuit further includes a first inductor (L1), a second inductor (L2), a plurality of capacitors and a switching circuit. The first inductor (L1) has a first terminal (N1) and a third terminal (N3), and the second inductor (L2) has a second terminal (N2) and a fourth terminal (N4). The switching circuit includes a first switch (S1), a second switch (S2), a third switch (S3) and a fourth switch (S4). The core circuit further includes a first inner circuit, a first outer circuit, a second inner circuit, and a second outer circuit. Configurations of these switches are adjustable and resonance caused between these terminals is changed accordingly.

A transmission system comprising: an output-terminal configured to provide an output-signal; a phase-shift oscillator comprising a plurality of phase-shifters, each configured to provide one of a plurality of phase-shifted-signals; and a controller configured to provide a selected one of the phase-shifted-signals to the output-signal as a transition in the output-signal, at an instant in time that is based on one or more of the plurality of phase-shifted-signals.

Certain aspects of the present disclosure provide an inductor-enclosed switchable voltage-controlled oscillator (VCO), for use in a frequency synthesizer of a radio frequency integrated circuit (RFIC), for example. One example apparatus is a frequency synthesizer that generally includes a first VCO circuit comprising a first inductor and a second VCO circuit comprising a second inductor, wherein at least a portion of the first VCO circuit is disposed inside a loop of the second inductor. According to certain aspects, at least a portion of the second VCO circuit is disposed inside a loop of the first inductor.

A semiconductor device and a communication circuit capable of reducing the effect of a noise generated in an inductor are provided. A semiconductor device according to an embodiment includes a substrate, a first circuit disposed in a first area of the substrate, a second circuit disposed in a second area of the substrate, the second circuit being configured to operate selectively with the first circuit, a first inductor disposed in the second area and connected to the first circuit, and a second inductor disposed in the first area and connected to the second circuit.

It is often desirable to transmit data between circuits or components operating at a relatively high voltage and circuits operating at a relatively low voltage. Such a task can be performed by use of an isolator. Some isolator designs use magnetic coupling to transfer the data as this is more robust against inadvertently transmitting high voltage transients than capacitor based isolators. However it is often desirable to encode the data for exchange across the transformer of the isolator and decode after transmission across the transformer. This requires power for the encoding and decoding circuits. To ensure both sides are powered, power may be transferred by another transformer. The transformer primary is driven by an oscillating signal. The system disclosed in some embodiments herein varies the frequency of the oscillating signal to mitigate the risk of it interfering with other circuits or systems associated with the isolator.

A method and apparatus for performing a two-point calibration of a VCO in a PLL is disclosed. The method includes determining a first steady state tuning voltage of the VCO with no modulation voltage applied. Thereafter, an iterative process may be performed wherein a modulation voltage is applied to the VCO (along with the tuning voltage) and a modified divisor is applied to the divider circuit in the feedback loop. During each iteration, after the PLL is settled, the tuning voltage is measured and a difference between the current value and the first value is determined. If the current and first values of the turning voltage are not equal, another iteration may be performed, modifying at least one of the modulation voltage and the divisor, and determining the difference between the current and first values of the tuning voltage.

A signal generator and an associated resonator circuit are provided. The signal generator includes the resonator circuit and a core circuit. The resonator circuit further includes a first inductor (L1), a second inductor (L2), a plurality of capacitors and a switching circuit. The first inductor (L1) has a first terminal (N1) and a third terminal (N3), and the second inductor (L2) has a second terminal (N2) and a fourth terminal (N4). The switching circuit includes a first switch (S1), a second switch (S2), a third switch (S3) and a fourth switch (S4). The core circuit further includes a first inner circuit, a first outer circuit, a second inner circuit, and a second outer circuit. Configurations of these switches are adjustable and resonance caused between these terminals is changed accordingly.

A frequency calibration method for calibrating an output frequency of a voltage-controlled oscillator is provided. The voltage-controlled oscillator includes a first capacitor bank, a second capacitor bank, and a third capacitor bank. The first capacitor bank and the third capacitor bank are initially disabled and the second capacitor bank is initially enabled. The method includes, when the initial output frequency is lower than a reference frequency, adjusting the capacitance of the second capacitor bank until the calibrated output frequency is greater than the reference frequency, and when the initial output frequency is greater than the reference frequency, enabling the first capacitor bank and gradually increasing the capacitance of the first capacitor bank until the calibrated output frequency is lower than the reference frequency.

A device comprises a first capacitor block comprising a plurality of first capacitors connected in a first configuration, a second capacitor block comprising a plurality of second capacitors connected in the first configuration, a third capacitor block comprising a plurality of third capacitors connected in a second configuration, a fourth capacitor block comprising a plurality of fourth capacitors connected in the second configuration, a first switch connected between the first capacitor block and the second capacitor block, a second switch connected between the third capacitor block and the fourth capacitor block, a third switch connected between the first capacitor block and the fourth capacitor block and a fourth switch connected between the third capacitor block and the second capacitor block.