Embodiments of a mixer of a Near field communication (NFC) receiver device and a method for operating a mixer of an NFC receiver device are disclosed. In an embodiment, a mixer of an NFC receiver device includes an input unit from which an input signal is received, a sample and hold circuit configured to sample the input signal and to store electrical charge based on the sampled input signal in order to generate a differential output signal, a control unit configured to switch the sample and hold circuit between different operational modes based on whether the input signal is a single-ended input signal or a differential input signal, and a differential output unit from which the differential output signal is output. Other embodiments are also described.

A receiver includes circuitry configured to determine one or more first local oscillator (LO) harmonics that correspond to one or more first spectrum segments of a down-converted received signal based on characteristics of the received signal. The one or more first LO harmonics of the received signal are amplified by applying one or more first transconductance coefficients to one or more first harmonic selective transinductance amplifiers (TIAs) corresponding to the one or more first spectrum segments. Digitized outputs of the plurality of harmonic selective TIAs are calibrated based on an amount of signal leakage between the plurality of spectrum segments of the down-converted received signal.

An apparatus and a method. The apparatus includes passive mixers, wherein each of the passive mixers includes a first input for receiving BB.sub.I, a second input for receiving BB.sub.I, a third input for receiving BB.sub.Q, a fourth input for receiving BB.sub.Q, a fifth input for receiving a first clock signal with a unique phase shift within one of the passive mixers, a sixth input for receiving a second clock signal with a unique phase shift within one of the passive mixers, a seventh input for receiving a third clock signal with a unique phase shift within one of the passive mixers, an eighth input for receiving a fourth clock signal with a unique phase shift within one of the passive mixers, and at least one output; and a voltage-domain vector summation array connected to the output of each of the passive mixers.

The present disclosure provides an integrating circuit and a signal processing module. The integrating circuit comprises an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable resistance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit. The adjustable resistance module receives a plurality of first control signals, to adjust a resistance value of the adjustable resistance module. The present disclosure may realize the noise brought by sidelobe to enhance the SNR, and reduce the power consumption and complexity of the overall circuit.

The present technology relates to a signal processing apparatus and method capable of increasing a harmonic rejection ratio while suppressing an increase in power consumption.

In one aspect of the present technology, two local signals having a 1/3 duty ratio and phases mutually shifted by a 1/2 period are mixed with each signal of a differential signal, and a difference between results of the mixing of the two local signals is calculated. The present technology can be applied to, for example, a signal processing apparatus, a transmission apparatus, a reception apparatus, a communication apparatus, an electronic apparatus having a transmission function, a reception function, or a communication function, or a computer that controls those apparatuses.

A harmonic translational filter includes a first path, a second path and a signal combiner. The first path has a first translational filter that is driven by a plurality of first oscillation signals, and is arranged to generate a first output signal according to an input signal. The second path has a second translation filter that is driven by a plurality of second oscillation signals that are different from the first oscillation signals in phase. The second path is coupled to the first path and arranged to generate a second output signal according to the input signal. The signal combiner is coupled to the first path and the second path, and arranged to combine the first output signal and the second output signal to generate a filtered signal.

The mixer-first topology of receivers do not include low-noise amplifiers (LNA) preceding the mixer. The Mixer-First topology of radio receivers utilizes a direct-conversion quadrature mixer to down convert an RF signal to baseband, where a Hilbert Transform filter is used for sideband selection. When a switching mixer is used, the mixer-first receiver is capable of extremely high dynamic range and linearity. The downfall of the mixer-first topology is poor out-of-band signal rejection. A mixer-first receiver is described which achieves third-harmonic rejection without bandpass filtering proceeding the mixer.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and/or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and/or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

Mixer circuitry can include a first pair of transistors coupled to a first tail node and configured to receive a local oscillator signal, a second pair of transistors coupled to a second tail node and configured to receive the local oscillator signal, a first digital-to-analog converter, a second DAC coupled between the first DAC and of the first pair of transistors, and a third DAC coupled between the first DAC and the second pair of transistors. During a first phase, control circuitry can sweep the first DAC to trim a first and/or other odd order local oscillator feedthrough. During a second phase, the control circuitry can sweep the second DAC to trim a second and/or other even order local oscillator feedthrough. During a third phase, the control circuitry can sweep the second and third DACs to reject signals associated with a second harmonic conversion gain of the mixer circuitry.

A method for switching interval modulation includes modulating an RF input data signal while generating and inserting additional pulses in transitions of the data signal. The additional pulses are structured to shift transition noise into higher order harmonics. Higher order harmonics are easily filtered. The generating is conducted in the digital domain. The additional pulses can be used to simplify the transmit chain through optical modulators and improve the signal integrity over long distances, can be applied at the output of a transmitter to filter power amplifier distortion, and can be applied to non-linear RF over fiber for a distributed MIMO system.