Patent classifications
H03D2200/009
Optimizing power efficiency of a power amplifier circuit to reduce power consumption in a remote unit in a wireless distribution system (WDS)
Embodiments of the disclosure relate to optimizing power efficiency of a power amplifier circuit to reduce power consumption in a remote unit in a wireless distribution system (WDS). A power amplifier circuit is provided in the remote unit to amplify a received input signal associated with a signal channel(s) to generate an output signal at an aggregated peak power. In this regard, a control circuit is configured to analyze at least one physical property related to the signal channel(s) to determine a maximum output power of the power amplifier circuit. Accordingly, the control circuit configures the power amplifier circuit according to the determined maximum output power. By configuring the maximum output power based on the signal channel(s) in the input signal, it may be possible to optimize the power efficiency of the power amplifier circuit, thus helping to reduce the power consumption of the remote unit.
DIRECT CURRENT REMOVAL CIRCUIT
A direct current (DC) removal circuit is coupled to a radio-frequency (RF) module, which includes a local oscillator. The DC removal circuit includes: a waveform generator, generating a digital waveform signal having an average value that is smaller than a resolution of a converter coupled to the RF module; a digital adder, coupled to the waveform generator, adding the digital waveform signal to a digital DC value to generate an addition result; and a digital subtractor, subtracting the addition result from a digital signal to generate a subtraction result, so as to compensate leakage caused by the local oscillator.
Current mode signal path of an integrated radio frequency pulse generator
A current mode end-to-end signal path includes, a digital to analog converter (DAC), operating in current mode and an upconverting mixer, operating in current mode and operatively coupled to the DAC, wherein analog inputs and analog outputs of the DAC and the upconverting mixer are represented as currents, and the DAC generates a baseband signal.
METHOD FOR SUPPRESSING LOCAL OSCILLATOR LEAKAGE IN MICROWAVE CHIP AND APPARATUS THEREOF
In embodiments of the present disclosure, weighting on a direct current component coefficient dc.sub.i of an I-channel signal and a direct current component coefficient dc.sub.q of a Q-channel signal is performed based on spatial leakage factors k1 and k2 of a microwave chip and a current attenuation amount of a tunable attenuator, to determine a corrected direct current component coefficient dc.sub.i of the I-channel signal and a corrected direct current component coefficient dc.sub.q of the Q-channel signal, and a direct current component superimposed to the I-channel signal of the microwave chip and a direct current component superimposed to the Q-channel signal of the microwave chip are respectively determined based on the corrected direct current component coefficient dc.sub.i of the I-channel signal and the corrected direct current component coefficient dc.sub.q of the Q-channel signal.
Low-Voltage Crystal Oscillator Circuit Compatible With GPIO
Low voltage crystal oscillator having native NMOS transistors used for coupling/decoupling to/from GPIO. The native NMOS transistors function properly at a low supply voltage when on (low resistance) and a high supply voltage when off (high resistance). Oscillator Gm driver bias resistors are repurposed to degenerate the native NMOS transistors when they are off, thereby reducing the leakage current thereof (oscillator circuit decoupled from GPIO nodes). This ensures compliance with the CMOS IIH leakage current specification during an external clock (EC) mode at a high supply voltage.
MIXERS WITH IMPROVED LINEARITY
Systems and methods are disclosed for improved linearity performance of a mixer. An example mixer includes switching circuit elements configured to be switched on and switched off based at least partly on a local oscillator signal and capacitors including a respective capacitor in parallel with each of the switching elements. The mixer is configured to mix the input signal with the local oscillator signal to thereby frequency shift the input signal.
OPTIMIZING POWER EFFICIENCY OF A POWER AMPLIFIER CIRCUIT TO REDUCE POWER CONSUMPTION IN A REMOTE UNIT IN A WIRELESS DISTRIBUTION SYSTEM (WDS)
Embodiments of the disclosure relate to optimizing power efficiency of a power amplifier circuit to reduce power consumption in a remote unit in a wireless distribution system (WDS). A power amplifier circuit is provided in the remote unit to amplify a received input signal associated with a signal channel(s) to generate an output signal at an aggregated peak power. In this regard, a control circuit is configured to analyze at least one physical property related to the signal channel(s) to determine a maximum output power of the power amplifier circuit. Accordingly, the control circuit configures the power amplifier circuit according to the determined maximum output power. By configuring the maximum output power based on the signal channel(s) in the input signal, it may be possible to optimize the power efficiency of the power amplifier circuit, thus helping to reduce the power consumption of the remote unit.
Signal processing circuit for mitigating pulling effect and associated method
A signal processing circuit has a first mixer, a first amplifier, and a pulling effect mitigation circuit. The first mixer mixes a first input signal and a first oscillation signal to generate a first output signal, wherein the first oscillation signal is generated by dividing a frequency of a reference clock with a frequency dividing factor. The first amplifier amplifies the first output signal, and generates an amplified output signal at an output terminal of the first amplifier. The pulling effect mitigation circuit is coupled to the output terminal of the first amplifier, and generates a compensation signal to the output terminal for reducing at least an N.sup.th harmonic of the amplified output signal, wherein a value of N is equal to the frequency dividing factor.
LOCAL OSCILLATOR FEEDTHROUGH SIGNAL CORRECTION APPARATUS AND METHOD, AND MICROPROCESSOR CONTROL UNIT
The present disclosure discloses a local oscillator feedthrough signal correction apparatus, including a microprocessor control unit, a first digital-to-analog converter, a second digital-to-analog converter, a mixer, a local oscillator, a signal output line, a signal splitter, and a detector tube. The signal splitter is disposed in the signal output line, and the first digital-to-analog converter and the second digital-to-analog converter are configured to provide the mixer with quadrature direct current components VI and VQ used for local oscillator feedthrough signal correction. The mixer outputs a local oscillator feedthrough signal to the signal output line. The signal splitter obtains the local oscillator feedthrough signal by means of splitting, and the detector tube detects the local oscillator feedthrough signal. When a detection value of the local oscillator feedthrough signal exceeds a preset target value, the microprocessor control unit adjusts output values of the VI and the VQ to reduce local oscillator feedthrough.
APPARATUS AND METHODS FOR CALIBRATING RADIO FREQUENCY TRANSMITTERS TO COMPENSATE FOR COMMON MODE LOCAL OSCILLATOR LEAKAGE
Apparatus and methods for calibrating radio frequency transmitters to compensate for common mode local oscillator leakage are provided herein. In certain configurations herein, a transmitter generates a radio frequency transmit signal based on mixing a baseband input signal with a local oscillator signal. The transmitter is calibrated to compensate for common mode local oscillator leakage. Thus, a common mode component of the local oscillator signal is reduced or eliminated from the radio frequency transmit signal, which provides a number of benefits, including lower levels of undesired emissions from the transmitter.