Provided is an amplifier that includes a first transistor including a gate terminal to which an applied input signal is input, where a current depending on the applied input signal flows through the first transistor. A gate terminal of a second transistor is connected to a load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.

Two transistor rows are arranged on or in a substrate. Each of the two transistor rows is configured by a plurality of transistors aligned in a first direction, and the two transistor rows are arranged at an interval in a second direction orthogonal to the first direction. A first wiring is arranged between the two transistor rows when seen from above. The first wiring is connected to collectors or drains of the plurality of transistors in the two transistor rows. The first bump overlaps with the first wiring when seen from above, is arranged between the two transistor rows, and is connected to the first wiring.

A power amplifier comprises a first transistor, a second transistor, a first emitter follower, a first bias resistor, and coupling circuitry configured to couple the first bias resistor to a base of the first transistor, the first bias resistor, the second bias resistor, and an emitter of the first emitter follower at a first node, and a base of the first emitter follower to the second transistor.

A power amplifier comprises a first transistor, a first transformer, a first variable resistor, a first bias circuit and coupling circuitry configured to couple the first transformer, a first end of the first variable resistor, and a collector of the first transistor at a first node, the first transformer and a second end of the first variable resistor at a second node, and the bias circuit and a base of the first transistor at a third node.

An amplifier unit includes an amplifier, a bias circuit, an inductor, a variable resistor circuit, and a control circuit. The amplifier includes an amplifier transistor that amplifies an input radio-frequency signal. The bias circuit is connected to the amplifier. The inductor is connected between and in series with the amplifier and the bias circuit. The variable resistor circuit is connected to the inductor. The control circuit includes a measuring circuit and a comparison circuit. The measuring circuit measures an amplification characteristic value of the amplifier transistor. The comparison circuit compares the amplification characteristic value measured by the measuring circuit with a reference value. The control circuit controls the variable resistor circuit based on a comparison result of the comparison circuit.

A bias circuit includes first to fourth transistors and a phase compensation circuit. In the first transistor, a reference current or voltage is supplied to a first terminal, and the first terminal and a second terminal are connected. In the second transistor, a first terminal is connected to the first transistor, and a third terminal is grounded. In the third transistor, a power supply voltage is supplied to a first terminal, a second terminal is connected to the first transistor, and a bias current or voltage is supplied from a third terminal to an amplifier transistor. In the fourth transistor, a first terminal is connected to the third transistor, a second terminal is connected to the second transistor, and a third terminal is grounded. The phase compensation circuit is provided in a path extending from the fourth transistor to the third transistor through the second and first transistors.

An amplifier circuit includes an amplifier and a bias circuit. The bias circuit includes a bias transistor having a base terminal and a collector terminal, a transistor having a gate terminal, a source terminal, and a drain terminal, a transistor having a gate terminal, a source terminal, and a drain terminal, resistors, and a current source. The source terminals are connected to a power source. One end portion of the resistor is connected to the base terminal, the other end portion of the resistor is connected to the drain terminal, one end portion of the resistor is connected to the other end portion of the resistor, the other end portion of the resistor is connected to the bias output terminal, and the bias circuit further includes a feedback circuit that controls the electric potential of the base terminal based on the electric potential of the collector terminal.

A first transistor having a base or a gate supplied with a high-frequency signal through a capacitor, and supplied with a bias current through a resistive element, a second transistor having a base or a gate connected to an emitter or a source of the first transistor, and a collector or a drain connected to an output terminal, and a third transistor having a collector or a drain connected to the base or the gate of the first transistor, and an emitter or a source connected to reference potential are provided, and the third transistor is provided such that a current flowing through the collector or the drain of the third transistor increases when a current flowing through the collector or the drain of the second transistor increases.

The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

A biasing circuit with high current drive capability for fast settling of a biasing voltage to a stacked cascode amplifier is presented. According to a first aspect, the biasing circuit uses transistors matched with transistors of the cascode amplifier to generate a boost current during a transition phase that changes the biasing voltage by charging or discharging a capacitor. The boost current is activated during the transition phase and deactivated when a steady-state condition is reached. According to a second aspect, the biasing circuit uses an operational amplifier in a feedback loop that forces a source node of a cascode transistor of a reference circuit, that is a scaled down replica version of the cascode amplifier, to be at a reference voltage. The high gain and high current capability of the operational amplifier, provided by isolating a high frequency signal processed by the cascode amplifier from the reference circuit, allow for a quick settling of the biasing voltage.