Patent classifications
H03F1/302
Settling time reduction for low noise amplifier
A device includes: a transistor having an input terminal configured to receive an input signal and to amplify the input signal; a bias current source configured to set a bias current of the input terminal of the transistor, the bias current source having a control input for receiving a control signal for selecting the bias current to have one of a plurality of selectable bias current levels; a bias resistance connected between the bias current source and the input terminal of the transistor; a bypass switch for selectively bypassing a first part of the bias resistance; and a control circuit for controlling the bypass switch to bypass the part of the bias resistance for a predefined time period in response to a change in the bias current level, and for controlling the bypass switch to stop bypassing the first part of the bias resistance after the predefined time period expires.
HIGH LINEARITY INDUCTORLESS LNA
An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.
Power amplifier circuit
A power amplifier circuit includes a first transistor, a capacitor, and a second transistor. The first transistor has an emitter electrically connected to a reference potential, a base, and a collector electrically connected to a first power supply potential. A first end of the capacitor is electrically connected to the collector of the first transistor. The second transistor has an emitter electrically connected to a second end of the capacitor and electrically connected to the reference potential, a base, and a collector electrically connected to the first power supply potential. An RF output signal obtained by amplifying the RF input signal is output from the collector of the second transistor. A second bias circuit includes a third transistor having a collector electrically connected to a second power supply potential, a base, and an emitter from which the second bias current or voltage is output.
APPARATUS AND METHODS FOR BIAS SWITCHING OF POWER AMPLIFIERS
Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal and a bias control circuit that biases the power amplifier. The power amplifier includes an amplification transistor that receives the RF signal at an input, and a first bias network and a second bias network each connected to the input. The bias control circuit includes a first switch, a first reference current source that provides the first reference current to the first bias network through the first switch, a second switch, and a second reference current source that provides the second reference current to the second bias network through the second switch.
POWER AMPLIFICATION CIRCUIT, RADIO-FREQUENCY CIRCUIT, AND COMMUNICATION DEVICE
Gain is suppressed. In a power amplification circuit, a first transistor has a first input terminal, a first output terminal, and a first ground terminal. A second transistor has a second input terminal, a second output terminal, and a second ground terminal. The second input terminal is connected to the first input terminal. The second output terminal is connected to the first output terminal. A first bias circuit is connected to the first input terminal. A second bias circuit is connected to the second input terminal. A first resistor is connected between the first ground terminal and the ground. A second resistor is connected between the second ground terminal and the ground. The second resistor has a resistance value greater than that of the first resistor.
Temperature Detector
A temperature detector is used to detect a temperature of a circuit under test, and includes a temperature coefficient component, a multiplier, an impedance component and a node. The temperature coefficient component is arranged in proximity to the circuit under test. A control terminal of the multiplier is coupled to a second terminal of the temperature coefficient component. The impedance component is coupled between the second terminal of the temperature coefficient component and the control terminal of the multiplier, or between a second terminal of the multiplier and a third voltage terminal. The node is formed between the second terminal of the temperature coefficient component and the control terminal of the multiplier. A voltage at the node and an amplified detection current flowing to a first terminal of the multiplier are positively correlated to the temperature of the circuit under test.
Bias circuit and amplifying device with temperature compensation
A bias circuit includes a current generating circuit generating an internal base current based on a reference current, a bias output circuit generating a base bias current based on the internal base current and outputting the base bias current to an amplifying circuit, and a temperature compensation circuit regulating the base bias current based on a temperature voltage reflecting a change in ambient temperature.
Power amplifier module and power amplification method
An amplifier transistor operates in two operation modes having different characteristics. A first bias circuit including a first bias supply transistor supplies an output current of the first bias supply transistor to the amplifier transistor as a bias current. A second bias circuit including a second bias supply transistor supplies a portion of an output current of the second bias supply transistor to the amplifier transistor as a bias current. At least one of the first bias circuit and the second bias circuit is selected and operates in accordance with an operation mode of the amplifier transistor by using a bias control signal input to a bias control terminal. The second bias circuit includes a current path along which a portion of the output current of the second bias supply transistor is returned to the second bias circuit.
POWER AMPLIFIER CIRCUIT
A power amplifier circuit includes an amplifier transistor that amplifies a radio-frequency signal and outputs the radio-frequency signal, and a bias circuit that supplies a bias current to a base of the amplifier transistor. The bias circuit includes a bias current supply transistor, and an electrostatic capacity circuit whose electrostatic capacity varies in accordance with a temperature of the amplifier transistor and that is charged in a non-supply period during which the bias current is not supplied and discharges to a supply path for the bias current in a supply period during which the bias current is supplied. The supply period during which the bias current is supplied includes an amplification period during which the radio-frequency signal is amplified by the amplifier transistor. The bias current starts to be supplied before the amplifier transistor starts amplification.
Temperature correction circuit and method of operating a power amplifier
A temperature correction circuit and method for maintaining a transistor of a power amplifier in a linear operating region of the transistor. The temperature correction circuit includes a first current source circuit operable to provide a first correction current proportional to an absolute temperature of a semiconductor die including the transistor. The temperature correction circuit also includes a second current source circuit operable to provide a second correction current proportional to a change in temperature of a part of the semiconductor die in which the transistor is located during operation of the transistor. The temperature correction circuit further includes a third current source circuit operable to provide a gain selection current. The temperature correction circuit also includes circuitry for producing a reference current from the first and second correction currents and the gain current. The temperature correction circuit further includes an output for providing the reference current to the transistor.