Patent classifications
H03F1/305
MUTE MECHANISM WITH REDUCED POP NOISE IN AUDIO AMPLIFIER SYSTEMS AND METHODS
Systems and methods are provided for improved noise performance of audio amplifiers. In one example, a system includes a multistage amplifier comprising at least a first stage amplifier and a second stage amplifier. The system further includes a plurality of switches disposed within the multistage amplifier to configure the multistage amplifier. The system further includes a control signal configured to control the multistage amplifier to a normal amplification mode or a mute state, wherein the multistage amplifier is adapted to amplify an input signal in the normal amplification mode, the multistage amplifier is adapted to output a zero signal in the mute state, and internal amplification stages of the multistage amplifier are disabled in the mute state, and output stages of each of the at least first stage amplifier and the second stage amplifier are electrically shorted and/or shorted to a fixed bias voltage in the mute state.
CHARGE PUMP CIRCUIT AND CONTROLLING METHOD THEREOF
The application provides a charge pump circuit, includes a digital control circuit, coupled to the switch module, configured to receive a up digital signal and a down digital signal, and adjust a first output voltage to a voltage level of an input voltage and adjust an second output voltage to a ground voltage level according to the up digital signal and the down digital signal; a digital-to-analog converter (DAC), configured to generate a corresponding up reference voltage and a corresponding down reference voltage according to the up digital signal and the down digital signal; and a voltage follower, comprising a plurality of operational amplifiers and a plurality of transistor switches, configured to lock the first output voltage and the second output voltage according to the up reference voltage and the down reference voltage; wherein the up digital signal and the down digital signal are varied with time.
Power amplifier with supply switching
A power amplifier with supply switching is provided. The power amplifier detects a magnitude of an outgoing broadband communication signal and determines whether the magnitude exceeds a predetermined voltage threshold. The power amplifier applies a first gain to the outgoing broadband communication signal using a first voltage supply rail when it is determined that the magnitude exceeds the predetermined voltage threshold and a second gain using a second voltage supply rail that is smaller than the first voltage supply rail when it is determined that the magnitude does not exceed the predetermined voltage threshold. The power amplifier produces an output signal from the outgoing broadband communication signal with the applied first gain or the applied second gain, wherein a current of the outgoing broadband communication signal is switched between the first voltage supply rail and the second voltage supply rail in response to the magnitude being detected.
Audio Processing Circuit and Terminal Device
An audio processing circuit includes a cascade operational amplifier circuit, an output node, and a pull-down circuit. The cascade operational amplifier circuit includes a first operational amplifier circuit and a second operational amplifier circuit. The first operational amplifier circuit includes a main operational amplifier and a secondary operational amplifier that are connected in parallel. The pull-down circuit is configured to pull down a voltage at the output node after the first operational amplifier circuit is turned on. The second operational amplifier circuit is configured to, after the secondary operational amplifier is turned on, control a voltage gain of the secondary operational amplifier to change gradually from low to high.
Charge pump circuit and controlling method thereof
The application provides a charge pump circuit, including a switch module, including a plurality of switches and a soft ramp-up switch, configured to generate a first output voltage and a second output voltage according to an input voltage; and a digital control circuit, coupled to the switch module, configured to receive a up digital signal and a down digital signal, and adjust the first output voltage to a voltage level of the input voltage and adjust the second output voltage to a ground voltage level according to the up digital signal and the down digital signal. The charge pump circuit of application has advantages of minimizing inrush currents to avoid circumstances of distortions caused by the pop noises or clipping and optimizing the efficiency of the amplifier.
BIAS CIRCUIT AND POWER AMPLIFIER FOR IMPROVING LINEARITY
A bias circuit includes a current source to generate a reference current, a temperature compensation portion in an off-state in an initial start period in response to a first control signal, and in an on-state in a normal driving period, subsequent to the initial start period, and to receive a first current of the reference current, and a bias output portion to generate a warm up current based on the reference current in the initial start period and to generate a bias current based on a second current, which is lower than the reference current by an amount of the first current, in the normal driving period.
OPERATIONAL AMPLIFIER AND CONTROL METHOD THEREOF
An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.
Pop Sound Suppression Method, Audio Output Circuit, and Terminal
A pop sound suppression method, an audio output circuit, and a terminal suppress a pop sound that is generated when an audio output circuit is in an alternating current (AC) coupling structure. The output circuit includes an output power amplifier, a common-mode voltage buffer, a reference voltage generation circuit, a powered-on pop sound suppression switch, and a common-mode switch. The powered-on pop sound suppression switch is configured to control, in a power-on process of the audio output circuit, a voltage level of an output node to be zero. The common-mode switch is configured to control, when a reference voltage level of the reference voltage generation circuit is zero, the voltage level of the output node to be equal to the reference level.
Methods and circuits to reduce pop noise in an audio device
A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
AUDIO AMPLIFIER CIRCUITRY
The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.