Apparatus and associated methods relating to the amplification of an audio signal. In particular, such application is performed by using an audio to pulse train converter configured to convert an analog audio signal to a complementary train of pulses having a duty cycle indicative of the level of the analog audio signal. The audio to pulse train converter can be a class-D amplifier, a sigma-delta amplifier, self-oscillating amplifier, or any other audio amplifier that is configured to provide complementary pulse trains each having a duty cycle that is representative of the input audio signal. The complementary pulse trains are directed to a circlotron that is configured to provide an amplified version of the audio signal at two output nodes. The amplifier circuit may further include one or more low pass filters and/or output reference resistors. Two similar circuits can be configured together to provide stereo audio amplification.

An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

The present invention provides a driving circuit for a switching transistor and a driving device including the same. The driving circuit includes: a power amplifier, including a first power transistor and a second power transistor that are connected between a first direct current voltage terminal and a second direct current voltage terminal and are arranged in a push-pull circuit; a first voltage regulating device, connected between an input terminal of the power amplifier and a control terminal of the first power transistor; a third power transistor, connected between an output terminal of the power amplifier and the second direct current voltage terminal or a grounding terminal; a first voltage dividing device, connected between the input terminal and the output terminal of the power amplifier; and a transistor control circuit, configured to: control the third power transistor to be turned on when the switching transistor is located in a short-circuit path, and control the third power transistor to be turned off when the switching transistor is controlled to be turned on and is not located in the short-circuit path. The driving circuit of the present invention reduces the power consumption of the switching transistor and extends the time for short-circuit protection.

The present invention provides a driving circuit for a switching transistor and a driving device including the same. The driving circuit includes: a power amplifier, including a first power transistor and a second power transistor that are connected between a first direct current voltage terminal and a second direct current voltage terminal and are arranged in a push-pull circuit; a first voltage regulating device, connected between an input terminal of the power amplifier and a control terminal of the first power transistor; a third power transistor, connected between an output terminal of the power amplifier and the second direct current voltage terminal or a grounding terminal; a first voltage dividing device, connected between the input terminal and the output terminal of the power amplifier; and a transistor control circuit, configured to: control the third power transistor to be turned on when the switching transistor is located in a short-circuit path, and control the third power transistor to be turned off when the switching transistor is controlled to be turned on and is not located in the short-circuit path. The driving circuit of the present invention reduces the power consumption of the switching transistor and extends the time for short-circuit protection.

A power amplifier cell is disclosed having a first transistor with a first terminal coupled to ground, a second terminal, and a first control terminal. A second transistor has a third terminal coupled to the second terminal, a fourth terminal, and a second control terminal. Further included is a capacitor having a first plate coupled directly to the second control terminal and a second plate coupled to the ground. As such, there is no intervening inductor component coupled between the first plate and the second control terminal, leaving only parasitic inductance between the first plate and the second control terminal. The capacitor has a capacitance sized to resonate with the parasitic inductance at a resonant frequency substantially higher than a desired frequency of operation of the power amplifier cell.

Systems and methods for amplifying signals. In some embodiments, the signals may be amplified using a diode steering network with an amplifier operated in class AB mode. In some embodiments, distortion in the amplified signal may be corrected using a feed forward cancellation circuit operated in class A mode.

An embodiment discloses an operational amplifier comprising: an input stage; an output stage communicatively coupled to the input stage, wherein the output stage further comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first current source, a fifth transistor, a sixth transistor and a second current source, wherein a second node of the first transistor is connected to the input stage (vin), a third node of the first transistor is connected to a third node of the fourth transistor, ground (gnd), a third node of the fifth transistor and a third node of the third transistor, a first node of the first transistor is connected to a first node of the first current source, a second node of the sixth transistor and a second node of the second transistor.

An audio amplifier includes an operational amplifier, a replica of an output stage of the operational amplifier, and a feedback circuit configured such that, in a normal mode, an output signal of the operational amplifier is fed back to the input side of the operational amplifier, and such that, in a calibration mode, an output signal of the replica is fed back to the input side of the operational amplifier. The calibration circuit cancels out the offset voltage of the audio amplifier. An adjustment circuit changes the offset of the audio amplifier according to a control signal S1. A control circuit adjusts the control signal such that an output signal V.sub.S of the replica is within a predetermined target range in a state in which a predetermined voltage is input to the audio amplifier. Memory stores the control signal S2 acquired in the final stage.

An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the output stage and switchable between a first state and a second state in which the output stage is active and non-active, respectively. A further switch circuit is coupled to the output terminal and switchable between a first state and a second state in which the output stage is coupled to the output terminal and to a reference level, respectively.