According to one embodiment, a transimpedance circuit includes: a transimpedance amplifier that converts a current signal into a voltage signal, a reference voltage generating circuit that generates a reference voltage signal, and a comparator that generates a pulse signal corresponding to the current signal in accordance with a voltage level of the voltage signal and a voltage level of the reference voltage signal. The transimpedance amplifier includes a first transistor that amplifies the current signal, a voltage converter that converts the current signal into a voltage signal, and a bypass circuit that allows the current signal to be bypassed when the current signal which flows through a control terminal of the first transistor exceeds a predetermined value.

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

A digital-to-analog converter (DAC) circuit includes a pair of output stages, each including a DAC configured to convert a digital audio signal into an analog audio signal. A low-pass filter circuit includes an operational amplifier in signal communication with the DAC. The operation amplifier generates a filtered analog signal based on the analog audio signal. An amplifier network generates an amplified audio signal based on the filtered analog signal. The operational amplifier includes a feedback circuit path including a first node connected to the output of the amplifier network and a second node connected to the input of the operational amplifier. The amplifier network is electrically nested in the feedback circuit path.

A power amplifier including a power amplifier stage. The power amplifier stage may be configured to receive a signal, amplify the signal at saturation with substantially zero amplitude-phase (AM-PM) distortion, and output the amplified signal as an output signal. The power amplifier may be a single stage power amplifier or a multi-stage power amplifier.

A circuit for processing an N-level pulse amplitude modulation (PAM-N) signal according to an embodiment of the present invention comprises: an input unit receiving an input signal; a main amplifier connected to the input unit to amplify the input signal with a first gain; and an output unit outputting an output signal of the main amplifier, and the circuit further comprises an auxiliary amplifier connected in parallel with the main amplifier between the input unit and the output unit to variably amplify at least a portion of the input signal and apply the signal to the output unit according to a linearity improvement control signal corresponding to the output signal.

A transmission module includes n oscillator modules and a phase command signal generator. Each of the oscillator modules includes a voltage controlled oscillator and an amplification circuit. The voltage controlled oscillators output transmission high-frequency signals having the same frequency and synchronized among the n oscillator modules by synchronous control based on a common reference signal. The amplification circuits each perform power amplification for the transmission high-frequency signal from a corresponding one of the voltage controlled oscillators and output the resultant signal. Phases of the transmission high-frequency signals synchronized among the n oscillator modules and output from the voltage controlled oscillators are separately controlled according to respective n phase command signals from the phase command signal generator.

Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. Radio-frequency power amplifier circuitry may include an amplifier, an input transformer for coupling radio-frequency input signals to the amplifier, an active inductor load coupled to the input transformer, and a second order intermodulation generation circuit configured to generate and inject a second order intermodulation product into the input transformer. The injected second order intermodulation product can be used to cancel out unwanted third order intermodulation products generated by the amplifier, which reduces intermodulation distortion experienced by the amplifier circuitry.

A switching power amplifier with harmonic suppression including a polyphase converter and a power amplifier stage. The polyphase converter converts a frequency or phase modulated input signal into a 50% duty cycle rail-to-rail signal, a positive 25% duty cycle rail-to-rail signal that is centered with the 50% duty cycle signal when high, and a negative 25% duty cycle rail-to-rail signal that is centered with the 50% duty cycle signal when low. The power amplifier stage includes first and second branches coupled between upper and lower nodes, each including series-coupled P-channel and N-channel transistors forming an intermediate output node. The transistors of the first branch are controlled by the 50% duty cycle signal, and the transistors of the second branch are controlled by the positive and negative 25% duty cycle signals. The first and second branches generate output currents that are superimposed with each other to suppress third and fifth harmonics.

An amplifier includes a first transistor in which a gate terminal is connected to an input port of a signal and a source terminal is grounded, a second transistor in which a gate terminal is grounded and a source terminal is connected to a drain terminal of the first transistor, and a harmonic wave control circuit that is connected to the gate terminal of the second transistor and that controls a high harmonic wave component that is produced when the signal that is input from the input port is amplified.