Patent classifications
H03F3/19
Duplexer with balanced impedance ladder
An electrical balance duplexer has multiple impedance gradients and multiple impedance tuners. The electrical balance duplexer transmits an outgoing signal from a transmitter during a transmission mode when a first set of impedance gradients of the multiple impedance gradients is operating in a first impedance state and a first set of impedance tuners of the multiple impedance tuners is operating in a second state. The electrical balance duplexer isolates the outgoing signal from a receiver during the transmission mode when a second set of impedance gradients of the multiple impedance gradients and a second set of impedance tuners of the multiple impedance tuners are operating in the second impedance state.
POWER SUPPLY SWITCH CIRCUIT AND OPERATING METHOD THEREOF
A power supply switch circuit includes a first transistor that switches supplying of a first power supply voltage to a power supply terminal of a power amplifier, a switch controller that controls the first transistor and to which a second power supply voltage is applied, and a voltage selector that selects a higher voltage among the first power supply voltage and the second power supply voltage. The selected higher voltage is applied to a body terminal of the first transistor or a gate terminal of the first transistor.
SELECTIVELY SWITCHABLE WIDEBAND RF SUMMER
A radio frequency (RF) summer circuit having a characteristic impedance Z.sub.0 comprises first and second ports coupled by first and second resistances, respectively, to a junction. The circuit further comprises a series combination of a third resistance and a switch movable between open and closed positions and an amplifier having input and output terminals and operable in an off state and an on state wherein the series combination is coupled across the input and output terminals of the amplifier between the junction and a third port. The first resistance, second resistance, and the third resistance are all substantially equal to Z.sub.0/3. Further, when the switch is moved to the closed position and the amplifier is switched to the off state a passive mode of operation is implemented and when the switch is moved to the open position and the amplifier is switched to the on state an active mode of operation is implemented. The RF summer circuit develops a summed signal at the third port equal to a sum of signals at the first and second ports modified by one of first and second gain values.
POWER TRANSISTOR DEVICES AND AMPLIFIERS WITH INPUT-SIDE HARMONIC TERMINATION CIRCUITS
An RF amplifier includes an amplifier input, a transistor die with a transistor and a transistor input terminal, a fundamental frequency impedance matching circuit coupled between the amplifier input and the transistor input terminal, and a harmonic frequency termination circuit coupled between the transistor input terminal and a ground reference node. The harmonic frequency termination circuit includes a first inductance coupled between the transistor input terminal and a first node, and a tank circuit coupled between the first node and the ground reference node. The tank circuit includes a first capacitance coupled between the first node and the ground reference node, and a second inductance coupled between the first node and the ground reference node. The tank circuit is configured to shunt signal energy at or near a second harmonic frequency, while appearing as an open circuit to signal energy at a fundamental frequency of operation of the RF amplifier.
POWER TRANSISTOR DEVICES AND AMPLIFIERS WITH INPUT-SIDE HARMONIC TERMINATION CIRCUITS
An RF amplifier includes an amplifier input, a transistor die with a transistor and a transistor input terminal, a fundamental frequency impedance matching circuit coupled between the amplifier input and the transistor input terminal, and a harmonic frequency termination circuit coupled between the transistor input terminal and a ground reference node. The harmonic frequency termination circuit includes a first inductance coupled between the transistor input terminal and a first node, and a tank circuit coupled between the first node and the ground reference node. The tank circuit includes a first capacitance coupled between the first node and the ground reference node, and a second inductance coupled between the first node and the ground reference node. The tank circuit is configured to shunt signal energy at or near a second harmonic frequency, while appearing as an open circuit to signal energy at a fundamental frequency of operation of the RF amplifier.
METHODS FOR GENERATING A CONSTANT CURRENT
A method for generating a constant current. The method can include receiving an input voltage at a voltage input connected to a resistor pair, the resistor pair including a first resistor and a second resistor, the first resistor having a positive temperature coefficient and the second resistor having a negative temperature coefficient. The first and second resistors can be configured such that the variability of resistance over temperature of the first resistor and the variability of resistance over temperature of the second resistor cancel to produce a zero temperature coefficient for the resistor pair. The method can further include applying the input voltage to the resistor pair to generate a current with a zero temperature coefficient.
METHODS FOR GENERATING A CONSTANT CURRENT
A method for generating a constant current. The method can include receiving an input voltage at a voltage input connected to a resistor pair, the resistor pair including a first resistor and a second resistor, the first resistor having a positive temperature coefficient and the second resistor having a negative temperature coefficient. The first and second resistors can be configured such that the variability of resistance over temperature of the first resistor and the variability of resistance over temperature of the second resistor cancel to produce a zero temperature coefficient for the resistor pair. The method can further include applying the input voltage to the resistor pair to generate a current with a zero temperature coefficient.
Digital envelop tracker for power amplifier
A digital envelop tracker for a power amplifier. The digital envelop tracker includes a supply filter for filtering a supply voltage to a power amplifier, a level selection circuitry configured to determine a level of supply voltage based on an instantaneous power of an input data stream, schedule a series of switching events based on the determined level of supply voltage, and generate a level select signal based on the scheduled series of switching events, and a switch for connecting one of supply voltages to the supply filter based on the level select signal. The level selection circuitry schedules a primary switching event of the switch based on the determined level of supply voltage and secondary switching events of the switch delayed with respect to the primary switching event based on the determined level of supply voltage to generate a filter response of the supply filter with smaller peaking.
Power amplifier circuit
A power amplifier circuit includes an input-stage power amplifier configured to receive a radio-frequency input signal, an output-stage power amplifier configured to output an amplified radio-frequency output signal, and an intermediate-stage power amplifier disposed between the input-stage power amplifier and the output-stage power amplifier. The intermediate-stage power amplifier includes a first transistor, a second transistor, and a capacitor having a first end connected to an emitter of the first transistor and a second end connected to a collector of the second transistor. The intermediate-stage power amplifier receives a signal at a base of the second transistor thereof and outputs an amplified signal from a collector of the first transistor thereof.
SYSTEM AND METHOD FOR NOISE MEASUREMENT
A receiver is for measuring the output noise of a device-under-test (DUT). The receiver includes an input port configured to connect to an output of the DUT, first and second measurement channels, and a cross-correlation circuit. The first measurement channel includes a first amplifier, a first mixer, a first local oscillator (LO), and a first analog-to-digital converter (ADC). The second measurement channel includes a second amplifier, a second mixer, a second local oscillator (LO), and a second analog-to-digital converter (ADC). A second LO frequency is different than a first LO frequency. The cross-correlation circuit is configured to cross-correlate sample values obtained from the first and second measurement channels to obtain the output noise of the DUT.