A transmission circuit includes a power amplifier, a power amplifier forestage circuit and a signal strength adjusting circuit. The power amplifier is configured to amplify an input signal to output an output signal. The power amplifier forestage circuit is configured to output the input signal. The signal strength adjusting circuit includes a conversion circuit, a processing circuit and a storage unit. The conversion circuit is configured to convert the voltage of the output signal into an operation value. The processing circuit is configured to perform an operation according to a target index value stored by the storage unit and the operation value to obtain a differential value. The processing circuit is further configured to adjust the input signal outputted by the power amplifier forestage circuit according to the differential value, so that the power of the output signal is maintained at a target power value.

A power supply switch circuit includes a switch circuit including a first switch configured to switch a first power source voltage to a power supply terminal of a power amplifier, and a second switch configured to switch a second power source voltage to the power supply terminal; a switch controller configured to control the switch circuit; and a power supply circuit configured to supply a third power source voltage to the power supply terminal when a first voltage of the power supply terminal is lower than a predetermined second voltage.

A semiconductor device includes a substrate, an active region provided in the substrate, a plurality of gate fingers provided on the active region, extending in an extension direction, and arranged in an arrangement direction orthogonal to the extension direction, and a gate connection wiring commonly connected to the plurality of gate fingers and provided between the plurality of gate fingers and a first side surface of the substrate, wherein when viewed from the arrangement direction, a first position where a first end of a first gate finger as a part of the plurality of gate fingers is connected to the gate connection wiring is closer to the first side surface than a second position where a first end of a second gate finger as another part of the plurality of gate fingers is connected to the gate connection wiring.

An antenna controller for an antenna is configured to request and receive status information comprising power amplifier data of at least two adjustable power amplifiers. The antenna controller is configured to determine at least one target setting for the at least two adjustable power amplifiers based on the received power amplifier data, and to send the at least one target setting for the at least two adjustable power amplifiers. Hereby it is made possible for an antenna controller to set an overall target for multiple adjustable power amplifiers of the antenna. This in turn makes it possible to make the settings for the adjustable power amplifiers such that the transmission signal becomes linearized by a shared digital pre-distorter when transmitting using the multiple adjustable power amplifiers of the antenna. A Radio Frequency Integrated Circuit controller for an antenna subarray is configured to control at least one adjustable power amplifier.

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The amplifier circuitry is operable in a non-carrier-aggregation mode and a carrier aggregation mode. The amplifier circuitry may include an input transformer that is coupled to multiple amplifier stages such as a common gate amplifier stage, a cascode amplifier stage, and a common source amplifier stage. The common gate amplifier stage may include switches for selectively activating a set of cross-coupled capacitors to help maintain input impedance matching in the non-carrier-aggregation mode and the carrier-aggregation mode. The common source amplifier stage may include additional switches for activating and deactivating the common source amplifier stage to help maintain the gain in the non-carrier-aggregation mode and the carrier-aggregation mode.

Systems and method for improving operation of a radio frequency system are provided. One embodiment includes a switching power amplifier that outputs an amplified analog electrical signal based on an input electrical signal and voltage of an envelope voltage supply rail. The switching power amplifier includes a first transistor with a gate that receives the input electrical signal, a source electrically coupled to the envelope voltage supply rail, and a drain electrically coupled to an output of the switching power amplifier; a second transistor with a gate that receives the input electrical signal, a source electrically coupled to ground, and a drain electrically coupled to the output; and a third transistor with a gate that receives the input electrical signal, a drain electrically coupled to the envelope voltage supply rail, and a source electrically coupled to an output of another switching power amplifier.

Systems and method for improving operation of a radio frequency system are provided. One embodiment includes a switching power amplifier that outputs an amplified analog electrical signal based on an input electrical signal and voltage of an envelope voltage supply rail. The switching power amplifier includes a first transistor with a gate that receives the input electrical signal, a source electrically coupled to the envelope voltage supply rail, and a drain electrically coupled to an output of the switching power amplifier; a second transistor with a gate that receives the input electrical signal, a source electrically coupled to ground, and a drain electrically coupled to the output; and a third transistor with a gate that receives the input electrical signal, a drain electrically coupled to the envelope voltage supply rail, and a source electrically coupled to an output of another switching power amplifier.

A synthesizer circuit to generate a local oscillator carrier signal for a baseband signal includes a controlled oscillator comprising a phase lock loop and an oscillator configured to generate an oscillating signal. A pulling compensation circuit is configured to generate a correction signal for a present output of the phase locked loop using information on an error of the oscillating signal, information on a present sample of a baseband signal and a preceding correction signal for a preceding output of the phase locked loop.

A digital to time converter (DTC). The DTC includes a lookup table, a divider, a thermometric array and a switched capacitor array. The lookup table is configured to generate one or more corrections based on thermometric bits of an input signal. The divider is configured to generate a plurality of divider signals from an oscillator signal based on the one or more corrections. The thermometric array is configured to generate a medium approximation signal from the plurality of divider signals based on the one or more corrections. The switched capacitor array is configured to generate a digital delay signal from the medium approximation signal based on the one or more corrections and switched capacitor bits of the input signal.

An apparatus, system, and method are provided for energy conversion. For example, the apparatus can include a trans-impedance node, a reactive element, and a trans-impedance circuit. The reactive element can be configured to transfer energy to the trans-impedance node. The trans-impedance circuit can be configured to receive one or more control signals and to dynamically adjust an impedance of the trans-impedance node. The trans-impedance node, as a result, can operate as an RF power switching supply based on the one or more control signals.