Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.

A balun configured for a power range between 500 W and 5 kW output includes a balanced signal port comprising a first connection and a second connection and further includes a single-ended signal port comprising a third connection and a fourth connection, the fourth connection being connected to ground. In addition, the balun includes a first capacitor disposed between the first connection and a first end of a first resistor and a second capacitor disposed between the second connection and the first end of the first resistor. A second end of the first resistor is connected to ground.

A balun is disclosed and includes a dielectric substrate defining a first surface and a second surface. The balun includes a first output port including a first output ground portion and first output power portion; a second output port including a second output ground portion and a second output power portion; and an input port including an input ground portion and input power portion. The first output ground portion, the second output ground portion, and the input ground portion are coupled at a ground junction portion. The first output power portion, the second output power portion, and the input power portion are coupled at a power junction portion. The first output power portion, the second output power portion, and the input power portion are positioned on the first surface. The first output ground portion, the second output ground portion, and the input ground portion are positioned on the second surface.

An amplifier includes a first stage and a second stage. The first stage includes a floating current source to maintain current within a threshold. The first stage also includes a local common mode feedback configured to provide gain to an input signal. Moreover, the second stage includes a driver that provides a load current to a load coupled to the amplifier.

This technology relates to a single-phase differential conversion circuit for improving the linearity of input/output characteristics, a signal processing method for use with the circuit, and a reception apparatus. The single-phase differential conversion circuit includes a first source-grounded amplifier and a second source-grounded amplifier. Each of the amplifiers includes a transconductance amplifier section including a transistor for converting an AC component of input potential to a current, a diode load section including a transistor in a diode connection configured as a first load, and a large-signal distortion compensation circuit configured as a second load connected in parallel with the first load. The transistors of the first source-grounded amplifier are each a P-type MOS transistor, and the transistors of the second source-grounded amplifier are each an N-type MOS transistor. This technology is applied advantageously to a reception apparatus for receiving TV signals, for example.

Embodiments of a device and method are disclosed. In an embodiment, an RF amplifier includes first and second RF signal paths having RF input interfaces, RF output interfaces, and corresponding transistors connected between the respective RF input interfaces and RF output interfaces, wherein control terminals of the transistors are connected to the RF input interfaces and current conducting terminals of the transistors are connected to the corresponding RF output interfaces. The RF amplifier including a conductive path between the current conducting terminal of the first transistor and the current conducting terminal of the second transistor, wherein the conductive path includes a first inductance, a second inductance, and a capacitance electrically connected between the first inductance and the second inductance.

A fully differential amplifier includes: an input stage comprising a first amplification circuit and a second amplification circuit, one of which is configured to generate a push signal and the other of which is configured to generate a pull signal, each by amplifying a differential input signal; an output stage for generating a differential output signal based on the push signal and the pull signal; and a feedback circuit for providing common mode feedback to the first amplification circuit based on the differential output signal, wherein the second amplification circuit may include a passive network for setting a common mode voltage of the push signal or the pull signal.

An apparatus for generating an output current including a first distortion current based on a first transconductance and a second distortion current based on a second transconductance is disclosed. The first distortion current may be generated by an amplifier and the second distortion current may be generated by a distortion compensator. The second transconductance may be less than the first transconductance. In some implementations, the second distortion current may reduce the first distortion current output by the apparatus.

Power amplification system is disclosed. A power amplification system can include a Class-E push-pull amplifier including a transformer balun. The power amplification can further include a reactance compensation circuit coupled to the transformer balun. In some embodiments, the reactance compensation circuit is configured to reduce variation over frequency of a fundamental load impedance of the power amplification system.

An amplifier with two parallel coupled amplifier units with inverse characteristics and in particular to the parallel coupling of a sourcing limited amplifier unit and a sinking limited amplifier unit.